Search

Dean Phan

Examiner (ID: 8359, Phone: (571)270-1002 , Office: P/2184 )

Most Active Art Unit
2184
Art Unit(s)
2184, 2182
Total Applications
611
Issued Applications
415
Pending Applications
52
Abandoned Applications
152

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 18316715 [patent_doc_number] => 11630797 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-04-18 [patent_title] => Detection of a power state change in a serial bus repeater [patent_app_type] => utility [patent_app_number] => 17/341089 [patent_app_country] => US [patent_app_date] => 2021-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 10 [patent_no_of_words] => 10011 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 157 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17341089 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/341089
Detection of a power state change in a serial bus repeater Jun 6, 2021 Issued
Array ( [id] => 19872623 [patent_doc_number] => 12265483 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-04-01 [patent_title] => Shunt-series and series-shunt inductively peaked clock buffer, and asymmetric multiplexer and de-multiplexer [patent_app_type] => utility [patent_app_number] => 17/338479 [patent_app_country] => US [patent_app_date] => 2021-06-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 31 [patent_figures_cnt] => 33 [patent_no_of_words] => 17699 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17338479 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/338479
Shunt-series and series-shunt inductively peaked clock buffer, and asymmetric multiplexer and de-multiplexer Jun 2, 2021 Issued
Array ( [id] => 18291381 [patent_doc_number] => 11620251 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-04-04 [patent_title] => Partitioned UFP for displayport repeater [patent_app_type] => utility [patent_app_number] => 17/303230 [patent_app_country] => US [patent_app_date] => 2021-05-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4535 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 186 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17303230 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/303230
Partitioned UFP for displayport repeater May 23, 2021 Issued
Array ( [id] => 18561692 [patent_doc_number] => 11726935 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-08-15 [patent_title] => Security policy management in a seamlessly integrated microcontroller chip [patent_app_type] => utility [patent_app_number] => 17/315271 [patent_app_country] => US [patent_app_date] => 2021-05-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 31193 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 166 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17315271 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/315271
Security policy management in a seamlessly integrated microcontroller chip May 7, 2021 Issued
Array ( [id] => 18234930 [patent_doc_number] => 11599489 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-03-07 [patent_title] => Inter-die memory-bus transaction in a seamlessly integrated microcontroller chip [patent_app_type] => utility [patent_app_number] => 17/315270 [patent_app_country] => US [patent_app_date] => 2021-05-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 31191 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 152 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17315270 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/315270
Inter-die memory-bus transaction in a seamlessly integrated microcontroller chip May 7, 2021 Issued
Array ( [id] => 17172618 [patent_doc_number] => 20210326288 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-10-21 [patent_title] => Seamlessly Integrated Microcontroller Chip [patent_app_type] => utility [patent_app_number] => 17/315266 [patent_app_country] => US [patent_app_date] => 2021-05-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 31188 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 155 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17315266 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/315266
Seamlessly Integrated Microcontroller Chip May 7, 2021 Abandoned
Array ( [id] => 17172613 [patent_doc_number] => 20210326283 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-10-21 [patent_title] => Inter-Die Interrupt Communication in a Seamlessly Integrated Microcontroller Chip [patent_app_type] => utility [patent_app_number] => 17/315268 [patent_app_country] => US [patent_app_date] => 2021-05-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 31188 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17315268 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/315268
Inter-die interrupt communication in a seamlessly integrated microcontroller chip May 7, 2021 Issued
Array ( [id] => 17172403 [patent_doc_number] => 20210326073 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-10-21 [patent_title] => Power Management in a Seamlessly Integrated Microcontroller Chip [patent_app_type] => utility [patent_app_number] => 17/315267 [patent_app_country] => US [patent_app_date] => 2021-05-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 30783 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 142 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17315267 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/315267
Power management in a seamlessly integrated microcontroller chip May 7, 2021 Issued
Array ( [id] => 18275951 [patent_doc_number] => 11614894 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-03-28 [patent_title] => Hierarchical memory systems [patent_app_type] => utility [patent_app_number] => 17/307873 [patent_app_country] => US [patent_app_date] => 2021-05-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 12236 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 139 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17307873 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/307873
Hierarchical memory systems May 3, 2021 Issued
Array ( [id] => 18957497 [patent_doc_number] => 20240045824 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-02-08 [patent_title] => Remote Mapping Method, Apparatus and Device for Computing Resources, and Storage Medium [patent_app_type] => utility [patent_app_number] => 18/246817 [patent_app_country] => US [patent_app_date] => 2021-04-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6252 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18246817 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/246817
Remote mapping method, apparatus and device for computing resources, and storage medium Apr 25, 2021 Issued
Array ( [id] => 17682522 [patent_doc_number] => 11366776 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2022-06-21 [patent_title] => Network device configuration based on slave device type [patent_app_type] => utility [patent_app_number] => 17/229165 [patent_app_country] => US [patent_app_date] => 2021-04-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 12 [patent_no_of_words] => 8172 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 191 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17229165 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/229165
Network device configuration based on slave device type Apr 12, 2021 Issued
Array ( [id] => 17157925 [patent_doc_number] => 20210318976 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-10-14 [patent_title] => CHASSIS, CHASSIS MONITORING SYSTEM, AND CHASSIS MONITORING METHOD [patent_app_type] => utility [patent_app_number] => 17/227389 [patent_app_country] => US [patent_app_date] => 2021-04-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5333 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -8 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17227389 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/227389
CHASSIS, CHASSIS MONITORING SYSTEM, AND CHASSIS MONITORING METHOD Apr 11, 2021 Abandoned
Array ( [id] => 18606821 [patent_doc_number] => 11748288 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-09-05 [patent_title] => Discovery and safe enablement of high-speed management interface via PCIe card electro-mechanical connector [patent_app_type] => utility [patent_app_number] => 17/227022 [patent_app_country] => US [patent_app_date] => 2021-04-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3336 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 149 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17227022 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/227022
Discovery and safe enablement of high-speed management interface via PCIe card electro-mechanical connector Apr 8, 2021 Issued
Array ( [id] => 17172617 [patent_doc_number] => 20210326287 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-10-21 [patent_title] => Seamlessly Integrated Microcontroller Chip [patent_app_type] => utility [patent_app_number] => 17/225057 [patent_app_country] => US [patent_app_date] => 2021-04-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 31168 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17225057 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/225057
Seamlessly integrated microcontroller chip Apr 6, 2021 Issued
Array ( [id] => 18480074 [patent_doc_number] => 11693815 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-07-04 [patent_title] => System for data transmission and valve system [patent_app_type] => utility [patent_app_number] => 17/223759 [patent_app_country] => US [patent_app_date] => 2021-04-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 5845 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 209 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17223759 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/223759
System for data transmission and valve system Apr 5, 2021 Issued
Array ( [id] => 17379986 [patent_doc_number] => 11238002 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2022-02-01 [patent_title] => Accessory interface for a portable communication device [patent_app_type] => utility [patent_app_number] => 17/220178 [patent_app_country] => US [patent_app_date] => 2021-04-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 5815 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 136 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17220178 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/220178
Accessory interface for a portable communication device Mar 31, 2021 Issued
Array ( [id] => 18804142 [patent_doc_number] => 11837305 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-12-05 [patent_title] => Memory-based logic testing [patent_app_type] => utility [patent_app_number] => 17/199936 [patent_app_country] => US [patent_app_date] => 2021-03-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 89 [patent_figures_cnt] => 90 [patent_no_of_words] => 66634 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 155 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17199936 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/199936
Memory-based logic testing Mar 11, 2021 Issued
Array ( [id] => 18766760 [patent_doc_number] => 11817167 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-11-14 [patent_title] => Variable word length access [patent_app_type] => utility [patent_app_number] => 17/199599 [patent_app_country] => US [patent_app_date] => 2021-03-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 89 [patent_figures_cnt] => 90 [patent_no_of_words] => 66635 [patent_no_of_claims] => 35 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 145 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17199599 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/199599
Variable word length access Mar 11, 2021 Issued
Array ( [id] => 16936137 [patent_doc_number] => 20210202026 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-07-01 [patent_title] => MEMORY-BASED PROCESSORS [patent_app_type] => utility [patent_app_number] => 17/199818 [patent_app_country] => US [patent_app_date] => 2021-03-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 66541 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -29 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17199818 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/199818
MEMORY-BASED PROCESSORS Mar 11, 2021 Abandoned
Array ( [id] => 16920152 [patent_doc_number] => 20210193244 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-06-24 [patent_title] => MEMORY-BASED PROCESSORS [patent_app_type] => utility [patent_app_number] => 17/196422 [patent_app_country] => US [patent_app_date] => 2021-03-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 66539 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -25 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17196422 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/196422
Partial refresh Mar 8, 2021 Issued
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