Search

Deborah Yee

Examiner (ID: 8646, Phone: (571)272-1253 , Office: P/1734 )

Most Active Art Unit
1742
Art Unit(s)
1101, 1793, 1733, 1308, 1742, 1724, 3629, 1754, 1734, 1311, 2899
Total Applications
3735
Issued Applications
2973
Pending Applications
107
Abandoned Applications
657

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 1155720 [patent_doc_number] => 06764923 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-07-20 [patent_title] => 'Method for manufacturing components of an SOI wafer' [patent_app_type] => B2 [patent_app_number] => 10/145172 [patent_app_country] => US [patent_app_date] => 2002-05-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 3 [patent_no_of_words] => 3160 [patent_no_of_claims] => 41 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 303 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/764/06764923.pdf [firstpage_image] =>[orig_patent_app_number] => 10145172 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/145172
Method for manufacturing components of an SOI wafer May 12, 2002 Issued
Array ( [id] => 6874586 [patent_doc_number] => 20030194883 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-10-16 [patent_title] => 'Benchtop processing' [patent_app_type] => new [patent_app_number] => 10/123721 [patent_app_country] => US [patent_app_date] => 2002-04-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 3399 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 21 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0194/20030194883.pdf [firstpage_image] =>[orig_patent_app_number] => 10123721 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/123721
Benchtop processing Apr 14, 2002 Issued
Array ( [id] => 6867723 [patent_doc_number] => 20030080412 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-05-01 [patent_title] => 'Semiconductor device and method of manufacturing the same' [patent_app_type] => new [patent_app_number] => 10/120422 [patent_app_country] => US [patent_app_date] => 2002-04-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3947 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 71 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0080/20030080412.pdf [firstpage_image] =>[orig_patent_app_number] => 10120422 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/120422
Semiconductor device Apr 11, 2002 Issued
Array ( [id] => 5964581 [patent_doc_number] => 20020089028 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-07-11 [patent_title] => 'High voltage breakdown isolation semiconductor device and manufacturing process for making the device' [patent_app_type] => new [patent_app_number] => 10/097852 [patent_app_country] => US [patent_app_date] => 2002-03-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 12004 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0089/20020089028.pdf [firstpage_image] =>[orig_patent_app_number] => 10097852 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/097852
High voltage breakdown isolation semiconductor device and manufacturing process for making the device Mar 14, 2002 Issued
Array ( [id] => 1165369 [patent_doc_number] => 06756281 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-06-29 [patent_title] => 'Self aligned symmetric intrinsic process and device' [patent_app_type] => B2 [patent_app_number] => 10/096742 [patent_app_country] => US [patent_app_date] => 2002-03-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 18 [patent_no_of_words] => 5993 [patent_no_of_claims] => 55 [patent_no_of_ind_claims] => 11 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/756/06756281.pdf [firstpage_image] =>[orig_patent_app_number] => 10096742 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/096742
Self aligned symmetric intrinsic process and device Mar 13, 2002 Issued
Array ( [id] => 1179934 [patent_doc_number] => 06740561 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-05-25 [patent_title] => 'Method of manufacturing a semiconductor device' [patent_app_type] => B2 [patent_app_number] => 10/093791 [patent_app_country] => US [patent_app_date] => 2002-03-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 11 [patent_no_of_words] => 5579 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 142 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/740/06740561.pdf [firstpage_image] =>[orig_patent_app_number] => 10093791 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/093791
Method of manufacturing a semiconductor device Mar 6, 2002 Issued
Array ( [id] => 1341378 [patent_doc_number] => 06586307 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-07-01 [patent_title] => 'Method for controlling an emitter window opening in an HBT and related structure' [patent_app_type] => B1 [patent_app_number] => 10/075701 [patent_app_country] => US [patent_app_date] => 2002-02-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4279 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/586/06586307.pdf [firstpage_image] =>[orig_patent_app_number] => 10075701 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/075701
Method for controlling an emitter window opening in an HBT and related structure Feb 13, 2002 Issued
Array ( [id] => 5787402 [patent_doc_number] => 20020160556 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-10-31 [patent_title] => 'Semiconductor device and method for forming the same' [patent_app_type] => new [patent_app_number] => 10/036480 [patent_app_country] => US [patent_app_date] => 2002-01-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 6155 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0160/20020160556.pdf [firstpage_image] =>[orig_patent_app_number] => 10036480 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/036480
Semiconductor device and method for forming the same Jan 6, 2002 Issued
Array ( [id] => 6688551 [patent_doc_number] => 20030032276 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-02-13 [patent_title] => 'Method of fabricating a wafer level package' [patent_app_type] => new [patent_app_number] => 10/024892 [patent_app_country] => US [patent_app_date] => 2001-12-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 3828 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 35 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0032/20030032276.pdf [firstpage_image] =>[orig_patent_app_number] => 10024892 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/024892
Method of fabricating a wafer level package Dec 17, 2001 Issued
Array ( [id] => 6290565 [patent_doc_number] => 20020055266 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-05-09 [patent_title] => 'Controlled cleavage process using pressurized fluid' [patent_app_type] => new [patent_app_number] => 10/017044 [patent_app_country] => US [patent_app_date] => 2001-12-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 9581 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0055/20020055266.pdf [firstpage_image] =>[orig_patent_app_number] => 10017044 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/017044
Controlled cleavage process using pressurized fluid Dec 12, 2001 Abandoned
Array ( [id] => 1188842 [patent_doc_number] => 06734073 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-05-11 [patent_title] => 'Method for manufacturing a bipolar junction transistor' [patent_app_type] => B2 [patent_app_number] => 10/007931 [patent_app_country] => US [patent_app_date] => 2001-12-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 13 [patent_no_of_words] => 3668 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 52 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/734/06734073.pdf [firstpage_image] =>[orig_patent_app_number] => 10007931 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/007931
Method for manufacturing a bipolar junction transistor Dec 6, 2001 Issued
Array ( [id] => 6414661 [patent_doc_number] => 20020125471 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-09-12 [patent_title] => 'CMOS inverter circuits utilizing strained silicon surface channel MOSFETS' [patent_app_type] => new [patent_app_number] => 10/005274 [patent_app_country] => US [patent_app_date] => 2001-12-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 10187 [patent_no_of_claims] => 54 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 54 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0125/20020125471.pdf [firstpage_image] =>[orig_patent_app_number] => 10005274 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/005274
CMOS inverter circuits utilizing strained silicon surface channel MOSFETS Dec 3, 2001 Abandoned
Array ( [id] => 6834802 [patent_doc_number] => 20030162348 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-08-28 [patent_title] => 'Complementary metal oxide semiconductor transistor technology using selective epitaxy of a strained silicon germanium layer' [patent_app_type] => new [patent_app_number] => 10/002031 [patent_app_country] => US [patent_app_date] => 2001-11-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3387 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 177 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0162/20030162348.pdf [firstpage_image] =>[orig_patent_app_number] => 10002031 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/002031
Complementary metal oxide semiconductor transistor technology using selective epitaxy of a strained silicon germanium layer Nov 29, 2001 Issued
Array ( [id] => 1126586 [patent_doc_number] => 06790736 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-09-14 [patent_title] => 'Method for manufacturing and structure of semiconductor device with polysilicon definition structure' [patent_app_type] => B2 [patent_app_number] => 09/997972 [patent_app_country] => US [patent_app_date] => 2001-11-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 3309 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 142 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/790/06790736.pdf [firstpage_image] =>[orig_patent_app_number] => 09997972 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/997972
Method for manufacturing and structure of semiconductor device with polysilicon definition structure Nov 28, 2001 Issued
Array ( [id] => 5828710 [patent_doc_number] => 20020068405 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-06-06 [patent_title] => 'Fabrication method for a semiconductor integrated circuit device' [patent_app_type] => new [patent_app_number] => 09/988321 [patent_app_country] => US [patent_app_date] => 2001-11-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 4718 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 171 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0068/20020068405.pdf [firstpage_image] =>[orig_patent_app_number] => 09988321 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/988321
Fabrication method for a semiconductor integrated circuit device Nov 18, 2001 Abandoned
Array ( [id] => 6870152 [patent_doc_number] => 20030082841 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-05-01 [patent_title] => 'Fluid ejection device fabrication' [patent_app_type] => new [patent_app_number] => 10/003780 [patent_app_country] => US [patent_app_date] => 2001-10-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 3619 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0082/20030082841.pdf [firstpage_image] =>[orig_patent_app_number] => 10003780 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/003780
Fluid ejection device fabrication Oct 30, 2001 Issued
Array ( [id] => 6474218 [patent_doc_number] => 20020022330 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-02-21 [patent_title] => 'Bipolar transistor and method for fabricating the same' [patent_app_type] => new [patent_app_number] => 09/984422 [patent_app_country] => US [patent_app_date] => 2001-10-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3886 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 197 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0022/20020022330.pdf [firstpage_image] =>[orig_patent_app_number] => 09984422 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/984422
Bipolar transistor and method for fabricating the same Oct 29, 2001 Abandoned
Array ( [id] => 1285326 [patent_doc_number] => 06638858 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-10-28 [patent_title] => 'Hole metal-filling method' [patent_app_type] => B2 [patent_app_number] => 10/020700 [patent_app_country] => US [patent_app_date] => 2001-10-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 10 [patent_no_of_words] => 1488 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/638/06638858.pdf [firstpage_image] =>[orig_patent_app_number] => 10020700 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/020700
Hole metal-filling method Oct 29, 2001 Issued
Array ( [id] => 6400088 [patent_doc_number] => 20020036895 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-03-28 [patent_title] => 'Method and system for mounting semiconductor device, semiconductor device separating system, and method for fabricating IC card' [patent_app_type] => new [patent_app_number] => 09/984673 [patent_app_country] => US [patent_app_date] => 2001-10-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 31 [patent_figures_cnt] => 31 [patent_no_of_words] => 19183 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 141 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0036/20020036895.pdf [firstpage_image] =>[orig_patent_app_number] => 09984673 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/984673
Method and system for mounting semiconductor device, semiconductor device separating system, and method for fabricating IC card Oct 29, 2001 Abandoned
Array ( [id] => 1179804 [patent_doc_number] => 06740536 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-05-25 [patent_title] => 'Devices and methods for integrated circuit manufacturing' [patent_app_type] => B2 [patent_app_number] => 10/055161 [patent_app_country] => US [patent_app_date] => 2001-10-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 0 [patent_no_of_words] => 4587 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/740/06740536.pdf [firstpage_image] =>[orig_patent_app_number] => 10055161 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/055161
Devices and methods for integrated circuit manufacturing Oct 25, 2001 Issued
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