Debra Chun

Array ( [id] => 2775797 [patent_doc_number] => 05036459 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-07-30 [patent_title] => 'Multi-processor computer system with distributed memory and an interprocessor communication mechanism, and method for operating such mechanism' [patent_app_type] => 1 [patent_app_number] => 7/321412 [patent_app_country] => US [patent_app_date] => 1989-03-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 6 [patent_no_of_words] => 5422 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 188 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/036/05036459.pdf [firstpage_image] =>[orig_patent_app_number] => 321412 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2828865 [patent_doc_number] => 05081702 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-01-14 [patent_title] => 'Method and apparatus for processing more than one high speed signal through a single high speed input terminal of a microcontroller' [patent_app_type] => 1 [patent_app_number] => 7/321050 [patent_app_country] => US [patent_app_date] => 1989-03-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 2510 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 246 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/081/05081702.pdf [firstpage_image] =>[orig_patent_app_number] => 321050 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2753282 [patent_doc_number] => 05029125 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-07-02 [patent_title] => 'Method of reading and writing files on nonerasable storage media' [patent_app_type] => 1 [patent_app_number] => 7/320020 [patent_app_country] => US [patent_app_date] => 1989-03-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 20 [patent_no_of_words] => 4834 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 182 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/029/05029125.pdf [firstpage_image] =>[orig_patent_app_number] => 320020 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2833210 [patent_doc_number] => 05095523 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-03-10 [patent_title] => 'Signal processor including programmable logic unit formed of individually controllable output bit producing sections' [patent_app_type] => 1 [patent_app_number] => 7/319008 [patent_app_country] => US [patent_app_date] => 1989-03-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 5 [patent_no_of_words] => 2276 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 234 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/095/05095523.pdf [firstpage_image] =>[orig_patent_app_number] => 319008 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2733616 [patent_doc_number] => 05057997 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-10-15 [patent_title] => 'Interruption systems for externally changing a context of program execution of a programmed processor' [patent_app_type] => 1 [patent_app_number] => 7/310409 [patent_app_country] => US [patent_app_date] => 1989-02-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 6 [patent_no_of_words] => 4004 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 381 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/057/05057997.pdf [firstpage_image] =>[orig_patent_app_number] => 310409 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2765356 [patent_doc_number] => 05043874 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-08-27 [patent_title] => 'Memory configuration for use with means for interfacing a system control unit for a multi-processor system with the system main memory' [patent_app_type] => 1 [patent_app_number] => 7/306404 [patent_app_country] => US [patent_app_date] => 1989-02-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 19 [patent_no_of_words] => 15740 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 210 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/043/05043874.pdf [firstpage_image] =>[orig_patent_app_number] => 306404 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2691180 [patent_doc_number] => 05046000 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-09-03 [patent_title] => 'Single-FIFO high speed combining switch' [patent_app_type] => 1 [patent_app_number] => 7/303699 [patent_app_country] => US [patent_app_date] => 1989-01-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 2415 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 223 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/046/05046000.pdf [firstpage_image] =>[orig_patent_app_number] => 303699 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2889728 [patent_doc_number] => 05109350 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-04-28 [patent_title] => 'Evaluation system' [patent_app_type] => 1 [patent_app_number] => 7/301418 [patent_app_country] => US [patent_app_date] => 1989-01-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 3535 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/109/05109350.pdf [firstpage_image] =>[orig_patent_app_number] => 301418 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2892800 [patent_doc_number] => 05109508 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-04-28 [patent_title] => 'Data base system including memorandum information and method for managing memorandum information' [patent_app_type] => 1 [patent_app_number] => 7/301662 [patent_app_country] => US [patent_app_date] => 1989-01-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 3986 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 145 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/109/05109508.pdf [firstpage_image] =>[orig_patent_app_number] => 301662 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2481815 [patent_doc_number] => 04887234 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1989-12-12 [patent_title] => 'Portable electronic device with plural memory areas' [patent_app_type] => 1 [patent_app_number] => 7/298261 [patent_app_country] => US [patent_app_date] => 1989-01-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 36 [patent_no_of_words] => 6789 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/887/04887234.pdf [firstpage_image] =>[orig_patent_app_number] => 298261 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2755533 [patent_doc_number] => 05012442 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-04-30 [patent_title] => 'Bus receiver power-up synchronization and error detection circuit' [patent_app_type] => 1 [patent_app_number] => 7/286196 [patent_app_country] => US [patent_app_date] => 1988-12-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 21 [patent_no_of_words] => 2742 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 693 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/012/05012442.pdf [firstpage_image] =>[orig_patent_app_number] => 286196 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2799255 [patent_doc_number] => 05155826 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-10-13 [patent_title] => 'Memory paging method and apparatus' [patent_app_type] => 1 [patent_app_number] => 7/280048 [patent_app_country] => US [patent_app_date] => 1988-12-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5093 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/155/05155826.pdf [firstpage_image] =>[orig_patent_app_number] => 280048 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2678800 [patent_doc_number] => 05047924 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-09-10 [patent_title] => 'Microcomputer' [patent_app_type] => 1 [patent_app_number] => 7/279029 [patent_app_country] => US [patent_app_date] => 1988-12-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 2079 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 184 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/047/05047924.pdf [firstpage_image] =>[orig_patent_app_number] => 279029 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2697179 [patent_doc_number] => 05050065 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-09-17 [patent_title] => 'Reconfigurable multiprocessor machine for signal processing' [patent_app_type] => 1 [patent_app_number] => 7/266147 [patent_app_country] => US [patent_app_date] => 1988-11-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 9 [patent_no_of_words] => 6697 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 296 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/050/05050065.pdf [firstpage_image] =>[orig_patent_app_number] => 266147 [rel_patent_id] =>[rel_patent_doc_number] =>)