Search

Debra Chun

Examiner (ID: 11282)

Most Active Art Unit
2308
Art Unit(s)
2308, 2307
Total Applications
364
Issued Applications
277
Pending Applications
0
Abandoned Applications
87

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 2861011 [patent_doc_number] => 05089951 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-02-18 [patent_title] => 'Microcomputer incorporating memory' [patent_app_type] => 1 [patent_app_number] => 7/266006 [patent_app_country] => US [patent_app_date] => 1988-11-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 3774 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 132 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/089/05089951.pdf [firstpage_image] =>[orig_patent_app_number] => 266006 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/266006
Microcomputer incorporating memory Nov 1, 1988 Issued
Array ( [id] => 2778515 [patent_doc_number] => 04985831 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-01-15 [patent_title] => 'Multiprocessor task scheduling system' [patent_app_type] => 1 [patent_app_number] => 7/265372 [patent_app_country] => US [patent_app_date] => 1988-10-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 4771 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 140 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/985/04985831.pdf [firstpage_image] =>[orig_patent_app_number] => 265372 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/265372
Multiprocessor task scheduling system Oct 30, 1988 Issued
Array ( [id] => 2691127 [patent_doc_number] => 05045997 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-09-03 [patent_title] => 'Data processor' [patent_app_type] => 1 [patent_app_number] => 7/264056 [patent_app_country] => US [patent_app_date] => 1988-10-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 9 [patent_no_of_words] => 3243 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 323 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/045/05045997.pdf [firstpage_image] =>[orig_patent_app_number] => 264056 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/264056
Data processor Oct 27, 1988 Issued
Array ( [id] => 2721242 [patent_doc_number] => 05010475 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-04-23 [patent_title] => 'Consistency ensuring system for the contents of a cache memory' [patent_app_type] => 1 [patent_app_number] => 7/264067 [patent_app_country] => US [patent_app_date] => 1988-10-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 18 [patent_no_of_words] => 8233 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 290 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/010/05010475.pdf [firstpage_image] =>[orig_patent_app_number] => 264067 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/264067
Consistency ensuring system for the contents of a cache memory Oct 27, 1988 Issued
Array ( [id] => 2803991 [patent_doc_number] => 05136707 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-08-04 [patent_title] => 'Reliable database administration arrangement' [patent_app_type] => 1 [patent_app_number] => 7/264283 [patent_app_country] => US [patent_app_date] => 1988-10-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 2894 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/136/05136707.pdf [firstpage_image] =>[orig_patent_app_number] => 264283 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/264283
Reliable database administration arrangement Oct 27, 1988 Issued
07/273511 PLC PROCESSOR AND PLC Oct 24, 1988 Abandoned
Array ( [id] => 2717683 [patent_doc_number] => 04982404 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-01-01 [patent_title] => 'Method and apparatus for insuring operation of a multiple part system controller' [patent_app_type] => 1 [patent_app_number] => 7/256819 [patent_app_country] => US [patent_app_date] => 1988-10-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 2984 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 199 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/982/04982404.pdf [firstpage_image] =>[orig_patent_app_number] => 256819 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/256819
Method and apparatus for insuring operation of a multiple part system controller Oct 11, 1988 Issued
Array ( [id] => 2705898 [patent_doc_number] => 04991133 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-02-05 [patent_title] => 'Specialized communications processor for layered protocols' [patent_app_type] => 1 [patent_app_number] => 7/254986 [patent_app_country] => US [patent_app_date] => 1988-10-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 24 [patent_no_of_words] => 7616 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 276 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/991/04991133.pdf [firstpage_image] =>[orig_patent_app_number] => 254986 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/254986
Specialized communications processor for layered protocols Oct 6, 1988 Issued
07/254217 INTERLACING THE PATHS AFTER A CONDITIONAL BRANCH LIKE INSTRUCTION Oct 5, 1988 Abandoned
Array ( [id] => 3063620 [patent_doc_number] => 05305460 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-04-19 [patent_title] => 'Data processor' [patent_app_type] => 1 [patent_app_number] => 7/254267 [patent_app_country] => US [patent_app_date] => 1988-10-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4962 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 161 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/305/05305460.pdf [firstpage_image] =>[orig_patent_app_number] => 254267 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/254267
Data processor Oct 4, 1988 Issued
Array ( [id] => 2697359 [patent_doc_number] => 05050075 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-09-17 [patent_title] => 'High performance VLSI data filter' [patent_app_type] => 1 [patent_app_number] => 7/253240 [patent_app_country] => US [patent_app_date] => 1988-10-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 6105 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 179 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/050/05050075.pdf [firstpage_image] =>[orig_patent_app_number] => 253240 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/253240
High performance VLSI data filter Oct 3, 1988 Issued
Array ( [id] => 2597683 [patent_doc_number] => 04970640 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1990-11-13 [patent_title] => 'Device initiated partial system quiescing' [patent_app_type] => 1 [patent_app_number] => 7/251969 [patent_app_country] => US [patent_app_date] => 1988-09-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 8240 [patent_no_of_claims] => 41 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 183 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/970/04970640.pdf [firstpage_image] =>[orig_patent_app_number] => 251969 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/251969
Device initiated partial system quiescing Sep 25, 1988 Issued
07/248406 SOFTWARE DEVELOPMENT SYSTEM AND METHOD USING EXPANDING OUTLINE INTERFACE Sep 22, 1988 Abandoned
Array ( [id] => 3023482 [patent_doc_number] => 05276806 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-01-04 [patent_title] => 'Oblivious memory computer networking' [patent_app_type] => 1 [patent_app_number] => 7/249645 [patent_app_country] => US [patent_app_date] => 1988-09-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 30 [patent_figures_cnt] => 37 [patent_no_of_words] => 10874 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 199 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/276/05276806.pdf [firstpage_image] =>[orig_patent_app_number] => 249645 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/249645
Oblivious memory computer networking Sep 18, 1988 Issued
07/243732 INFORMATION PROCESSING APPARATUS Sep 12, 1988 Abandoned
07/240602 DATA PROCESSOR Sep 5, 1988 Abandoned
Array ( [id] => 2757612 [patent_doc_number] => 05038308 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-08-06 [patent_title] => 'Compact system unit for personal computers' [patent_app_type] => 1 [patent_app_number] => 7/232714 [patent_app_country] => US [patent_app_date] => 1988-08-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 14 [patent_no_of_words] => 3348 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/038/05038308.pdf [firstpage_image] =>[orig_patent_app_number] => 232714 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/232714
Compact system unit for personal computers Aug 15, 1988 Issued
Array ( [id] => 2882860 [patent_doc_number] => 05163141 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-11-10 [patent_title] => 'RAM lock device and method for a text entry system' [patent_app_type] => 1 [patent_app_number] => 7/226717 [patent_app_country] => US [patent_app_date] => 1988-08-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 4294 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 189 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/163/05163141.pdf [firstpage_image] =>[orig_patent_app_number] => 226717 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/226717
RAM lock device and method for a text entry system Jul 31, 1988 Issued
Array ( [id] => 2774910 [patent_doc_number] => 05006980 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-04-09 [patent_title] => 'Pipelined digital CPU with deadlock resolution' [patent_app_type] => 1 [patent_app_number] => 7/222008 [patent_app_country] => US [patent_app_date] => 1988-07-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 12 [patent_no_of_words] => 10433 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 175 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/006/05006980.pdf [firstpage_image] =>[orig_patent_app_number] => 222008 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/222008
Pipelined digital CPU with deadlock resolution Jul 19, 1988 Issued
07/219345 QUEUE HAVING LONG WORD LENGTH Jul 14, 1988 Abandoned
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