
Deepak R. Rao
Examiner (ID: 1911, Phone: (571)272-0672 , Office: P/1624 )
| Most Active Art Unit | 1624 |
| Art Unit(s) | 1624, 1611, 1202 |
| Total Applications | 3005 |
| Issued Applications | 2150 |
| Pending Applications | 168 |
| Abandoned Applications | 701 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 11586501
[patent_doc_number] => 09641157
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2017-05-02
[patent_title] => 'Method and device for filtering during a change in an ARMA filter'
[patent_app_type] => utility
[patent_app_number] => 14/005801
[patent_app_country] => US
[patent_app_date] => 2012-03-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 7
[patent_no_of_words] => 9936
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 158
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14005801
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/005801 | Method and device for filtering during a change in an ARMA filter | Mar 13, 2012 | Issued |
Array
(
[id] => 11801279
[patent_doc_number] => 09542155
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2017-01-10
[patent_title] => 'Proxy calculation system, method, request device and program thereof'
[patent_app_type] => utility
[patent_app_number] => 14/002481
[patent_app_country] => US
[patent_app_date] => 2012-03-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 3616
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 271
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14002481
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/002481 | Proxy calculation system, method, request device and program thereof | Mar 1, 2012 | Issued |
Array
(
[id] => 11509078
[patent_doc_number] => 09600238
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2017-03-21
[patent_title] => 'Fully digital chaotic differential equation-based systems and methods'
[patent_app_type] => utility
[patent_app_number] => 13/408388
[patent_app_country] => US
[patent_app_date] => 2012-02-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 20
[patent_figures_cnt] => 40
[patent_no_of_words] => 15733
[patent_no_of_claims] => 31
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 217
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13408388
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/408388 | Fully digital chaotic differential equation-based systems and methods | Feb 28, 2012 | Issued |
Array
(
[id] => 8372227
[patent_doc_number] => 20120221618
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2012-08-30
[patent_title] => 'ENCRYPTION METHOD COMPRISING AN EXPONENTIATION OPERATION'
[patent_app_type] => utility
[patent_app_number] => 13/403285
[patent_app_country] => US
[patent_app_date] => 2012-02-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 7015
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13403285
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/403285 | ENCRYPTION METHOD COMPRISING AN EXPONENTIATION OPERATION | Feb 22, 2012 | Abandoned |
Array
(
[id] => 8987549
[patent_doc_number] => 20130214830
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-08-22
[patent_title] => 'APPARATUS AND METHOD FOR PHASE LOCKED LOOP BANDWIDTH EXPANSION'
[patent_app_type] => utility
[patent_app_number] => 13/400959
[patent_app_country] => US
[patent_app_date] => 2012-02-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 2509
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13400959
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/400959 | Apparatus and method for phase locked loop bandwidth expansion | Feb 20, 2012 | Issued |
Array
(
[id] => 8978709
[patent_doc_number] => 20130212139
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-08-15
[patent_title] => 'MIXED PRECISION ESTIMATE INSTRUCTION COMPUTING NARROW PRECISION RESULT FOR WIDE PRECISION INPUTS'
[patent_app_type] => utility
[patent_app_number] => 13/369470
[patent_app_country] => US
[patent_app_date] => 2012-02-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
[patent_figures_cnt] => 14
[patent_no_of_words] => 9725
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13369470
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/369470 | Mixed precision estimate instruction computing narrow precision result for wide precision inputs | Feb 8, 2012 | Issued |
Array
(
[id] => 10513190
[patent_doc_number] => 09240771
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2016-01-19
[patent_title] => 'Method and apparatus for generating signal having converted sampling rate in communication system'
[patent_app_type] => utility
[patent_app_number] => 13/368656
[patent_app_country] => US
[patent_app_date] => 2012-02-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 11
[patent_no_of_words] => 6673
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 373
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13368656
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/368656 | Method and apparatus for generating signal having converted sampling rate in communication system | Feb 7, 2012 | Issued |
Array
(
[id] => 9926053
[patent_doc_number] => 08984039
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2015-03-17
[patent_title] => 'Residue-based error detection for a processor execution unit that supports vector operations'
[patent_app_type] => utility
[patent_app_number] => 13/367032
[patent_app_country] => US
[patent_app_date] => 2012-02-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 11
[patent_no_of_words] => 7597
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 200
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13367032
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/367032 | Residue-based error detection for a processor execution unit that supports vector operations | Feb 5, 2012 | Issued |
Array
(
[id] => 8337117
[patent_doc_number] => 20120203815
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2012-08-09
[patent_title] => 'MATRIX CALCULATION METHOD, PROGRAM, AND SYSTEM'
[patent_app_type] => utility
[patent_app_number] => 13/363421
[patent_app_country] => US
[patent_app_date] => 2012-02-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 6416
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13363421
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/363421 | MATRIX CALCULATION METHOD, PROGRAM, AND SYSTEM | Jan 31, 2012 | Abandoned |
Array
(
[id] => 9264531
[patent_doc_number] => 20130346460
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-12-26
[patent_title] => 'METHOD AND DEVICE FOR FILTERING A SIGNAL AND CONTROL DEVICE FOR A PROCESS'
[patent_app_type] => utility
[patent_app_number] => 13/979159
[patent_app_country] => US
[patent_app_date] => 2012-01-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 4446
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13979159
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/979159 | METHOD AND DEVICE FOR FILTERING A SIGNAL AND CONTROL DEVICE FOR A PROCESS | Jan 9, 2012 | Abandoned |
Array
(
[id] => 8906175
[patent_doc_number] => 20130173678
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-07-04
[patent_title] => 'MULTI-STAGE ADAPTIVE FILTER'
[patent_app_type] => utility
[patent_app_number] => 13/341872
[patent_app_country] => US
[patent_app_date] => 2011-12-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 1973
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13341872
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/341872 | Multi-stage adaptive filter | Dec 29, 2011 | Issued |
Array
(
[id] => 8229730
[patent_doc_number] => 20120143935
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2012-06-07
[patent_title] => 'FILTER DEVICE AND METHOD FOR PROVIDING A FILTER DEVICE'
[patent_app_type] => utility
[patent_app_number] => 13/339746
[patent_app_country] => US
[patent_app_date] => 2011-12-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 3574
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13339746
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/339746 | FILTER DEVICE AND METHOD FOR PROVIDING A FILTER DEVICE | Dec 28, 2011 | Abandoned |
Array
(
[id] => 9193185
[patent_doc_number] => 20130332500
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-12-12
[patent_title] => 'SIGNAL PROCESSING APPARATUS, SIGNAL PROCESSING METHOD, STORAGE MEDIUM'
[patent_app_type] => utility
[patent_app_number] => 14/001508
[patent_app_country] => US
[patent_app_date] => 2011-12-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 21
[patent_figures_cnt] => 21
[patent_no_of_words] => 11693
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14001508
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/001508 | Signal processing apparatus, signal processing method, storage medium | Dec 18, 2011 | Issued |
Array
(
[id] => 9392140
[patent_doc_number] => 08688761
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2014-04-01
[patent_title] => 'Arithmetic logic and shifting device for use in a processor'
[patent_app_type] => utility
[patent_app_number] => 13/314530
[patent_app_country] => US
[patent_app_date] => 2011-12-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 6849
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 269
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13314530
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/314530 | Arithmetic logic and shifting device for use in a processor | Dec 7, 2011 | Issued |
Array
(
[id] => 10065633
[patent_doc_number] => 09104479
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2015-08-11
[patent_title] => 'Apparatus and method for rounding a floating-point value to an integral floating-point value'
[patent_app_type] => utility
[patent_app_number] => 13/313062
[patent_app_country] => US
[patent_app_date] => 2011-12-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 8270
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 290
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13313062
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/313062 | Apparatus and method for rounding a floating-point value to an integral floating-point value | Dec 6, 2011 | Issued |
Array
(
[id] => 8843083
[patent_doc_number] => 20130138711
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-05-30
[patent_title] => 'SHARED INTEGER, FLOATING POINT, POLYNOMIAL, AND VECTOR MULTIPLIER'
[patent_app_type] => utility
[patent_app_number] => 13/306460
[patent_app_country] => US
[patent_app_date] => 2011-11-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 6600
[patent_no_of_claims] => 24
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13306460
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/306460 | Shared integer, floating point, polynomial, and vector multiplier | Nov 28, 2011 | Issued |
Array
(
[id] => 9083040
[patent_doc_number] => 20130268570
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-10-10
[patent_title] => 'REPRESENTATIVE-VALUE CALCULATING DEVICE AND METHOD'
[patent_app_type] => utility
[patent_app_number] => 13/989478
[patent_app_country] => US
[patent_app_date] => 2011-11-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 9714
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13989478
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/989478 | REPRESENTATIVE-VALUE CALCULATING DEVICE AND METHOD | Nov 24, 2011 | Abandoned |
Array
(
[id] => 8130223
[patent_doc_number] => 20120089656
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2012-04-12
[patent_title] => 'RANDOM NUMBER GENERATOR CIRCUIT AND CRYPTOGRAPHIC CIRCUIT'
[patent_app_type] => utility
[patent_app_number] => 13/301932
[patent_app_country] => US
[patent_app_date] => 2011-11-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 18
[patent_figures_cnt] => 18
[patent_no_of_words] => 8613
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0089/20120089656.pdf
[firstpage_image] =>[orig_patent_app_number] => 13301932
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/301932 | Random number generator circuit and cryptographic circuit | Nov 21, 2011 | Issued |
Array
(
[id] => 8823549
[patent_doc_number] => 20130124594
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-05-16
[patent_title] => 'DIVIDER CIRCUITRY WITH QUOTIENT PREDICTION BASED ON ESTIMATED PARTIAL REMAINDER'
[patent_app_type] => utility
[patent_app_number] => 13/296754
[patent_app_country] => US
[patent_app_date] => 2011-11-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 5982
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13296754
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/296754 | DIVIDER CIRCUITRY WITH QUOTIENT PREDICTION BASED ON ESTIMATED PARTIAL REMAINDER | Nov 14, 2011 | Abandoned |
Array
(
[id] => 10119247
[patent_doc_number] => 09154141
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2015-10-06
[patent_title] => 'Continuous high-frequency event filter'
[patent_app_type] => utility
[patent_app_number] => 13/294083
[patent_app_country] => US
[patent_app_date] => 2011-11-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 11
[patent_no_of_words] => 7592
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 124
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13294083
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/294083 | Continuous high-frequency event filter | Nov 9, 2011 | Issued |