Search

Deepak R. Rao

Examiner (ID: 9276, Phone: (571)272-0672 , Office: P/1624 )

Most Active Art Unit
1624
Art Unit(s)
1624, 1611, 1202
Total Applications
3005
Issued Applications
2150
Pending Applications
168
Abandoned Applications
701

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 7211520 [patent_doc_number] => 20050259493 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-11-24 [patent_title] => 'Method and system for controlling refresh in volatile memories' [patent_app_type] => utility [patent_app_number] => 11/056486 [patent_app_country] => US [patent_app_date] => 2005-02-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3583 [patent_no_of_claims] => 35 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0259/20050259493.pdf [firstpage_image] =>[orig_patent_app_number] => 11056486 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/056486
Method and system for controlling refresh in volatile memories Feb 9, 2005 Issued
Array ( [id] => 895172 [patent_doc_number] => 07345941 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-03-18 [patent_title] => 'Semiconductor memory device and method of refreshing the semiconductor memory device' [patent_app_type] => utility [patent_app_number] => 11/049732 [patent_app_country] => US [patent_app_date] => 2005-02-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 11 [patent_no_of_words] => 6242 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/345/07345941.pdf [firstpage_image] =>[orig_patent_app_number] => 11049732 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/049732
Semiconductor memory device and method of refreshing the semiconductor memory device Feb 3, 2005 Issued
Array ( [id] => 6982099 [patent_doc_number] => 20050152168 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-07-14 [patent_title] => 'Match line sensing amplifier for content addressable memory' [patent_app_type] => utility [patent_app_number] => 11/043437 [patent_app_country] => US [patent_app_date] => 2005-01-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 3517 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0152/20050152168.pdf [firstpage_image] =>[orig_patent_app_number] => 11043437 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/043437
Match line sensing amplifier for content addressable memory Jan 26, 2005 Issued
Array ( [id] => 674404 [patent_doc_number] => 07092271 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-08-15 [patent_title] => 'CAM memory architecture and a method of forming and operating a device according to a CAM memory architecture' [patent_app_type] => utility [patent_app_number] => 11/034720 [patent_app_country] => US [patent_app_date] => 2005-01-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4310 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 145 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/092/07092271.pdf [firstpage_image] =>[orig_patent_app_number] => 11034720 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/034720
CAM memory architecture and a method of forming and operating a device according to a CAM memory architecture Jan 13, 2005 Issued
11/032792 Programmable matrix array with phase-change material Jan 10, 2005 Abandoned
Array ( [id] => 5655973 [patent_doc_number] => 20060141709 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-06-29 [patent_title] => 'Method for programming multi-level nitride read-only memory cells' [patent_app_type] => utility [patent_app_number] => 11/026947 [patent_app_country] => US [patent_app_date] => 2004-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 5727 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0141/20060141709.pdf [firstpage_image] =>[orig_patent_app_number] => 11026947 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/026947
Method for programming multi-level nitride read-only memory cells Dec 28, 2004 Issued
Array ( [id] => 5709244 [patent_doc_number] => 20060050589 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-03-09 [patent_title] => 'Power voltage supplier of semiconductor memory device' [patent_app_type] => utility [patent_app_number] => 11/020244 [patent_app_country] => US [patent_app_date] => 2004-12-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3321 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0050/20060050589.pdf [firstpage_image] =>[orig_patent_app_number] => 11020244 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/020244
Power voltage supplier of semiconductor memory device Dec 26, 2004 Issued
Array ( [id] => 475511 [patent_doc_number] => 07230851 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-06-12 [patent_title] => 'Reducing floating gate to floating gate coupling effect' [patent_app_type] => utility [patent_app_number] => 11/021872 [patent_app_country] => US [patent_app_date] => 2004-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 23 [patent_no_of_words] => 8899 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 55 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/230/07230851.pdf [firstpage_image] =>[orig_patent_app_number] => 11021872 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/021872
Reducing floating gate to floating gate coupling effect Dec 22, 2004 Issued
Array ( [id] => 486928 [patent_doc_number] => 07221590 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-05-22 [patent_title] => 'Flash memory devices having power level detection circuits' [patent_app_type] => utility [patent_app_number] => 11/020900 [patent_app_country] => US [patent_app_date] => 2004-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3829 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/221/07221590.pdf [firstpage_image] =>[orig_patent_app_number] => 11020900 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/020900
Flash memory devices having power level detection circuits Dec 22, 2004 Issued
Array ( [id] => 591937 [patent_doc_number] => 07450416 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2008-11-11 [patent_title] => 'Utilization of memory-diode which may have each of a plurality of different memory states' [patent_app_type] => utility [patent_app_number] => 11/021944 [patent_app_country] => US [patent_app_date] => 2004-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 31 [patent_no_of_words] => 5970 [patent_no_of_claims] => 37 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 54 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/450/07450416.pdf [firstpage_image] =>[orig_patent_app_number] => 11021944 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/021944
Utilization of memory-diode which may have each of a plurality of different memory states Dec 22, 2004 Issued
Array ( [id] => 6943587 [patent_doc_number] => 20050195636 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-09-08 [patent_title] => 'Semiconductor memory device with a stacked gate including a floating gate and a control gate' [patent_app_type] => utility [patent_app_number] => 11/016804 [patent_app_country] => US [patent_app_date] => 2004-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 21 [patent_no_of_words] => 13901 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0195/20050195636.pdf [firstpage_image] =>[orig_patent_app_number] => 11016804 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/016804
Semiconductor memory device with a stacked gate including a floating gate and a control gate Dec 20, 2004 Issued
Array ( [id] => 5647397 [patent_doc_number] => 20060133129 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-06-22 [patent_title] => 'METHODS FOR ENHANCING PERFORMANCE OF FERROELECTRIC MEMORY WITH POLARIZATION TREATMENT' [patent_app_type] => utility [patent_app_number] => 11/017572 [patent_app_country] => US [patent_app_date] => 2004-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 10535 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0133/20060133129.pdf [firstpage_image] =>[orig_patent_app_number] => 11017572 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/017572
Methods for enhancing performance of ferroelectic memory with polarization treatment Dec 19, 2004 Issued
Array ( [id] => 5806381 [patent_doc_number] => 20060092734 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-05-04 [patent_title] => 'Read circuit of semiconductor memory' [patent_app_type] => utility [patent_app_number] => 11/014862 [patent_app_country] => US [patent_app_date] => 2004-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 13036 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0092/20060092734.pdf [firstpage_image] =>[orig_patent_app_number] => 11014862 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/014862
Read circuit of semiconductor and read method using a self-reference sensing technique Dec 19, 2004 Issued
Array ( [id] => 7189151 [patent_doc_number] => 20050162959 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-07-28 [patent_title] => 'Semiconductor memory device with stable auto-precharge operation' [patent_app_type] => utility [patent_app_number] => 11/015472 [patent_app_country] => US [patent_app_date] => 2004-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 6328 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0162/20050162959.pdf [firstpage_image] =>[orig_patent_app_number] => 11015472 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/015472
Semiconductor memory device with stable auto-precharge operation Dec 19, 2004 Issued
Array ( [id] => 7049685 [patent_doc_number] => 20050185572 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-08-25 [patent_title] => 'Fast reading, low consumption memory device and reading method thereof' [patent_app_type] => utility [patent_app_number] => 11/018550 [patent_app_country] => US [patent_app_date] => 2004-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5152 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0185/20050185572.pdf [firstpage_image] =>[orig_patent_app_number] => 11018550 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/018550
Fast reading, low consumption memory device and reading method thereof Dec 19, 2004 Issued
Array ( [id] => 5647421 [patent_doc_number] => 20060133153 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-06-22 [patent_title] => 'Memory device' [patent_app_type] => utility [patent_app_number] => 11/016666 [patent_app_country] => US [patent_app_date] => 2004-12-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3082 [patent_no_of_claims] => 40 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0133/20060133153.pdf [firstpage_image] =>[orig_patent_app_number] => 11016666 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/016666
Memory device Dec 16, 2004 Issued
Array ( [id] => 693365 [patent_doc_number] => 07075824 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-07-11 [patent_title] => 'NAND flash memory device' [patent_app_type] => utility [patent_app_number] => 11/016286 [patent_app_country] => US [patent_app_date] => 2004-12-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 13 [patent_no_of_words] => 2196 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 197 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/075/07075824.pdf [firstpage_image] =>[orig_patent_app_number] => 11016286 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/016286
NAND flash memory device Dec 16, 2004 Issued
Array ( [id] => 5647393 [patent_doc_number] => 20060133125 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-06-22 [patent_title] => 'Apparatus and method for memory operations using address-dependent conditions' [patent_app_type] => utility [patent_app_number] => 11/015440 [patent_app_country] => US [patent_app_date] => 2004-12-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 5600 [patent_no_of_claims] => 45 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0133/20060133125.pdf [firstpage_image] =>[orig_patent_app_number] => 11015440 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/015440
Apparatus and method for memory operations using address-dependent conditions Dec 16, 2004 Issued
Array ( [id] => 5725457 [patent_doc_number] => 20060056217 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-03-16 [patent_title] => 'Magnetic memory device' [patent_app_type] => utility [patent_app_number] => 11/012178 [patent_app_country] => US [patent_app_date] => 2004-12-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 14436 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0056/20060056217.pdf [firstpage_image] =>[orig_patent_app_number] => 11012178 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/012178
Magnetic memory device Dec 15, 2004 Issued
Array ( [id] => 728161 [patent_doc_number] => 07046568 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-05-16 [patent_title] => 'Memory sensing circuit and method for low voltage operation' [patent_app_type] => utility [patent_app_number] => 11/015199 [patent_app_country] => US [patent_app_date] => 2004-12-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 29 [patent_figures_cnt] => 35 [patent_no_of_words] => 19940 [patent_no_of_claims] => 36 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 20 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/046/07046568.pdf [firstpage_image] =>[orig_patent_app_number] => 11015199 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/015199
Memory sensing circuit and method for low voltage operation Dec 15, 2004 Issued
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