Search

Deirdre D. Hatcher

Examiner (ID: 10670, Phone: (571)270-5321 , Office: P/3683 )

Most Active Art Unit
3683
Art Unit(s)
3625, 3683, 3684
Total Applications
404
Issued Applications
98
Pending Applications
68
Abandoned Applications
257

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 7213859 [patent_doc_number] => 20050253166 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-11-17 [patent_title] => 'Thermal anneal process for strained-Si devices' [patent_app_type] => utility [patent_app_number] => 10/845374 [patent_app_country] => US [patent_app_date] => 2004-05-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2237 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0253/20050253166.pdf [firstpage_image] =>[orig_patent_app_number] => 10845374 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/845374
Thermal anneal process for strained-Si devices May 12, 2004 Issued
Array ( [id] => 692015 [patent_doc_number] => 07075149 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-07-11 [patent_title] => 'Semiconductor device and its manufacturing method' [patent_app_type] => utility [patent_app_number] => 10/844323 [patent_app_country] => US [patent_app_date] => 2004-05-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 39 [patent_no_of_words] => 6634 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 143 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/075/07075149.pdf [firstpage_image] =>[orig_patent_app_number] => 10844323 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/844323
Semiconductor device and its manufacturing method May 12, 2004 Issued
Array ( [id] => 935639 [patent_doc_number] => 06974989 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2005-12-13 [patent_title] => 'Structure and method for protecting memory cells from UV radiation damage and UV radiation-induced charging during backend processing' [patent_app_type] => utility [patent_app_number] => 10/841933 [patent_app_country] => US [patent_app_date] => 2004-05-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 3085 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 58 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/974/06974989.pdf [firstpage_image] =>[orig_patent_app_number] => 10841933 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/841933
Structure and method for protecting memory cells from UV radiation damage and UV radiation-induced charging during backend processing May 5, 2004 Issued
Array ( [id] => 951735 [patent_doc_number] => 06960940 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2005-11-01 [patent_title] => 'Short circuit protection apparatus with self-clocking self-clearing latch' [patent_app_type] => utility [patent_app_number] => 10/837812 [patent_app_country] => US [patent_app_date] => 2004-05-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 2872 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/960/06960940.pdf [firstpage_image] =>[orig_patent_app_number] => 10837812 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/837812
Short circuit protection apparatus with self-clocking self-clearing latch May 2, 2004 Issued
Array ( [id] => 956483 [patent_doc_number] => 06956235 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-10-18 [patent_title] => 'Semiconductor device' [patent_app_type] => utility [patent_app_number] => 10/834093 [patent_app_country] => US [patent_app_date] => 2004-04-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 31 [patent_figures_cnt] => 79 [patent_no_of_words] => 26215 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 181 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/956/06956235.pdf [firstpage_image] =>[orig_patent_app_number] => 10834093 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/834093
Semiconductor device Apr 28, 2004 Issued
Array ( [id] => 686562 [patent_doc_number] => 07078278 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-07-18 [patent_title] => 'Dual-metal CMOS transistors with tunable gate electrode work function and method of making the same' [patent_app_type] => utility [patent_app_number] => 10/833073 [patent_app_country] => US [patent_app_date] => 2004-04-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 18 [patent_no_of_words] => 3460 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 176 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/078/07078278.pdf [firstpage_image] =>[orig_patent_app_number] => 10833073 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/833073
Dual-metal CMOS transistors with tunable gate electrode work function and method of making the same Apr 27, 2004 Issued
Array ( [id] => 7616749 [patent_doc_number] => 06946693 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2005-09-20 [patent_title] => 'Electromechanical electron transfer devices' [patent_app_type] => utility [patent_app_number] => 10/833344 [patent_app_country] => US [patent_app_date] => 2004-04-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 11 [patent_no_of_words] => 3934 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 200 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/946/06946693.pdf [firstpage_image] =>[orig_patent_app_number] => 10833344 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/833344
Electromechanical electron transfer devices Apr 26, 2004 Issued
Array ( [id] => 779186 [patent_doc_number] => 06995053 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-02-07 [patent_title] => 'Vertical thin film transistor' [patent_app_type] => utility [patent_app_number] => 10/831424 [patent_app_country] => US [patent_app_date] => 2004-04-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 15 [patent_no_of_words] => 4520 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/995/06995053.pdf [firstpage_image] =>[orig_patent_app_number] => 10831424 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/831424
Vertical thin film transistor Apr 22, 2004 Issued
Array ( [id] => 1022548 [patent_doc_number] => 06888221 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2005-05-03 [patent_title] => 'BICMOS technology on SIMOX wafers' [patent_app_type] => utility [patent_app_number] => 10/709114 [patent_app_country] => US [patent_app_date] => 2004-04-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 28 [patent_no_of_words] => 4262 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 33 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/888/06888221.pdf [firstpage_image] =>[orig_patent_app_number] => 10709114 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/709114
BICMOS technology on SIMOX wafers Apr 13, 2004 Issued
Array ( [id] => 7629416 [patent_doc_number] => 06818940 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-11-16 [patent_title] => 'Insulated gate bipolar transistor having trench gates of rectangular upper surfaces with different widths' [patent_app_type] => B2 [patent_app_number] => 10/821956 [patent_app_country] => US [patent_app_date] => 2004-04-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 19 [patent_no_of_words] => 4567 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 7 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/818/06818940.pdf [firstpage_image] =>[orig_patent_app_number] => 10821956 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/821956
Insulated gate bipolar transistor having trench gates of rectangular upper surfaces with different widths Apr 11, 2004 Issued
Array ( [id] => 7616738 [patent_doc_number] => 06946704 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-09-20 [patent_title] => 'Semiconductor memory cell and method of forming same' [patent_app_type] => utility [patent_app_number] => 10/808510 [patent_app_country] => US [patent_app_date] => 2004-03-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 34 [patent_no_of_words] => 5068 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 243 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/946/06946704.pdf [firstpage_image] =>[orig_patent_app_number] => 10808510 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/808510
Semiconductor memory cell and method of forming same Mar 24, 2004 Issued
Array ( [id] => 7314305 [patent_doc_number] => 20040222486 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-11-11 [patent_title] => 'BiCMOS TECHNOLOGY ON SOI SUBSTRATES' [patent_app_type] => new [patent_app_number] => 10/708743 [patent_app_country] => US [patent_app_date] => 2004-03-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 8221 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0222/20040222486.pdf [firstpage_image] =>[orig_patent_app_number] => 10708743 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/708743
BiCMOS technology on SOI substrates Mar 22, 2004 Issued
Array ( [id] => 1022475 [patent_doc_number] => 06888181 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2005-05-03 [patent_title] => 'Triple gate device having strained-silicon channel' [patent_app_type] => utility [patent_app_number] => 10/708694 [patent_app_country] => US [patent_app_date] => 2004-03-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2026 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/888/06888181.pdf [firstpage_image] =>[orig_patent_app_number] => 10708694 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/708694
Triple gate device having strained-silicon channel Mar 17, 2004 Issued
Array ( [id] => 968872 [patent_doc_number] => 06940149 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2005-09-06 [patent_title] => 'Structure and method of forming a bipolar transistor having a void between emitter and extrinsic base' [patent_app_type] => utility [patent_app_number] => 10/708563 [patent_app_country] => US [patent_app_date] => 2004-03-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 24 [patent_no_of_words] => 5363 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 44 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/940/06940149.pdf [firstpage_image] =>[orig_patent_app_number] => 10708563 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/708563
Structure and method of forming a bipolar transistor having a void between emitter and extrinsic base Mar 10, 2004 Issued
Array ( [id] => 7447795 [patent_doc_number] => 20040164326 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-08-26 [patent_title] => 'Semiconductor memories' [patent_app_type] => new [patent_app_number] => 10/790183 [patent_app_country] => US [patent_app_date] => 2004-03-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 36 [patent_figures_cnt] => 36 [patent_no_of_words] => 19225 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 204 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0164/20040164326.pdf [firstpage_image] =>[orig_patent_app_number] => 10790183 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/790183
Semiconductor memories Mar 1, 2004 Issued
Array ( [id] => 673053 [patent_doc_number] => 07091600 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-08-15 [patent_title] => 'Prevention of post CMP defects in CU/FSG process' [patent_app_type] => utility [patent_app_number] => 10/791014 [patent_app_country] => US [patent_app_date] => 2004-03-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 10 [patent_no_of_words] => 1833 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 60 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/091/07091600.pdf [firstpage_image] =>[orig_patent_app_number] => 10791014 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/791014
Prevention of post CMP defects in CU/FSG process Mar 1, 2004 Issued
Array ( [id] => 7314370 [patent_doc_number] => 20040222526 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-11-11 [patent_title] => 'Semiconductor device and manufacturing method thereof' [patent_app_type] => new [patent_app_number] => 10/789803 [patent_app_country] => US [patent_app_date] => 2004-02-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 7599 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 11 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0222/20040222526.pdf [firstpage_image] =>[orig_patent_app_number] => 10789803 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/789803
Semiconductor device and manufacturing method thereof Feb 26, 2004 Issued
Array ( [id] => 7448491 [patent_doc_number] => 20040164400 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-08-26 [patent_title] => 'Electronic component having at least one semiconductor chip on a circuit carrier and method for producing the same' [patent_app_type] => new [patent_app_number] => 10/784243 [patent_app_country] => US [patent_app_date] => 2004-02-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 6859 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0164/20040164400.pdf [firstpage_image] =>[orig_patent_app_number] => 10784243 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/784243
Electronic component having at least one semiconductor chip on a circuit carrier and method for producing the same Feb 23, 2004 Issued
Array ( [id] => 7314375 [patent_doc_number] => 20040222531 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-11-11 [patent_title] => 'Semiconductor device' [patent_app_type] => new [patent_app_number] => 10/782763 [patent_app_country] => US [patent_app_date] => 2004-02-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3916 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0222/20040222531.pdf [firstpage_image] =>[orig_patent_app_number] => 10782763 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/782763
Semiconductor device Feb 22, 2004 Issued
Array ( [id] => 7448445 [patent_doc_number] => 20040164395 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-08-26 [patent_title] => 'Surface-mounting semiconductor device and method of making the same' [patent_app_type] => new [patent_app_number] => 10/786403 [patent_app_country] => US [patent_app_date] => 2004-02-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 37 [patent_figures_cnt] => 37 [patent_no_of_words] => 14124 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 142 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0164/20040164395.pdf [firstpage_image] =>[orig_patent_app_number] => 10786403 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/786403
Surface-mounting semiconductor device and method of making the same Feb 22, 2004 Issued
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