
Deirdre D. Hatcher
Examiner (ID: 10670, Phone: (571)270-5321 , Office: P/3683 )
| Most Active Art Unit | 3683 |
| Art Unit(s) | 3625, 3683, 3684 |
| Total Applications | 404 |
| Issued Applications | 98 |
| Pending Applications | 68 |
| Abandoned Applications | 257 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 1071854
[patent_doc_number] => 06841438
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2005-01-11
[patent_title] => 'Annular gate and technique for fabricating an annular gate'
[patent_app_type] => utility
[patent_app_number] => 10/652944
[patent_app_country] => US
[patent_app_date] => 2003-08-29
[patent_effective_date] => 0000-00-00
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[patent_figures_cnt] => 20
[patent_no_of_words] => 5868
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/841/06841438.pdf
[firstpage_image] =>[orig_patent_app_number] => 10652944
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/652944 | Annular gate and technique for fabricating an annular gate | Aug 28, 2003 | Issued |
Array
(
[id] => 7304877
[patent_doc_number] => 20040140510
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[patent_kind] => A1
[patent_issue_date] => 2004-07-22
[patent_title] => 'Semiconductor memory device having a gate insulation film and a manufacturing method thereof'
[patent_app_type] => new
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[patent_app_date] => 2003-08-13
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/639443 | Semiconductor memory device having a multi-layered interlayer insulation consisting of deuterium and nitride | Aug 12, 2003 | Issued |
Array
(
[id] => 7030968
[patent_doc_number] => 20050029603
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-02-10
[patent_title] => 'VARYING CARRIER MOBILITY IN SEMICONDUCTOR DEVICES TO ACHIEVE OVERALL DESIGN GOALS'
[patent_app_type] => utility
[patent_app_number] => 10/633504
[patent_app_country] => US
[patent_app_date] => 2003-08-05
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/633504 | Varying carrier mobility in semiconductor devices to achieve overall design goals | Aug 4, 2003 | Issued |
Array
(
[id] => 7629268
[patent_doc_number] => 06819089
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2004-11-16
[patent_title] => 'Power factor correction circuit with high-voltage semiconductor component'
[patent_app_type] => B2
[patent_app_number] => 10/633044
[patent_app_country] => US
[patent_app_date] => 2003-08-01
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/633044 | Power factor correction circuit with high-voltage semiconductor component | Jul 31, 2003 | Issued |
Array
(
[id] => 7386424
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[patent_issue_date] => 2004-02-05
[patent_title] => 'Semiconductor array device with single interconnection layer'
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[patent_app_number] => 10/631893
[patent_app_country] => US
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/631893 | Semiconductor array device with single interconnection layer | Jul 31, 2003 | Issued |
Array
(
[id] => 757612
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[patent_issue_date] => 2006-03-21
[patent_title] => 'Super self-aligned collector device for mono-and hetero bipolar junction transistors and method of making same'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/632944 | Super self-aligned collector device for mono-and hetero bipolar junction transistors and method of making same | Jul 30, 2003 | Issued |
Array
(
[id] => 993973
[patent_doc_number] => 06917074
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[patent_issue_date] => 2005-07-12
[patent_title] => 'Multiplexer structure with interdigitated gates and shared diffusion'
[patent_app_type] => utility
[patent_app_number] => 10/626264
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/626264 | Multiplexer structure with interdigitated gates and shared diffusion | Jul 22, 2003 | Issued |
Array
(
[id] => 7292975
[patent_doc_number] => 20040212752
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-10-28
[patent_title] => 'Semiconductor element and liquid crystal display device using the same'
[patent_app_type] => new
[patent_app_number] => 10/623534
[patent_app_country] => US
[patent_app_date] => 2003-07-22
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[firstpage_image] =>[orig_patent_app_number] => 10623534
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/623534 | Static RAM having a TFT with n-type source and drain regions and a p-type region in contact with only the intrinsic channel of the same | Jul 21, 2003 | Issued |
Array
(
[id] => 1037488
[patent_doc_number] => 06872637
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[patent_issue_date] => 2005-03-29
[patent_title] => 'Opaque low resistivity silicon carbide'
[patent_app_type] => utility
[patent_app_number] => 10/620883
[patent_app_country] => US
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[pdf_file] => patents/06/872/06872637.pdf
[firstpage_image] =>[orig_patent_app_number] => 10620883
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/620883 | Opaque low resistivity silicon carbide | Jul 15, 2003 | Issued |
Array
(
[id] => 1066262
[patent_doc_number] => 06847093
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[patent_issue_date] => 2005-01-25
[patent_title] => 'Semiconductor integrated circuit device'
[patent_app_type] => utility
[patent_app_number] => 10/602697
[patent_app_country] => US
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/602697 | Semiconductor integrated circuit device | Jun 24, 2003 | Issued |
Array
(
[id] => 1176053
[patent_doc_number] => 06750530
[patent_country] => US
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[patent_issue_date] => 2004-06-15
[patent_title] => 'Semiconductor antifuse with heating element'
[patent_app_type] => B1
[patent_app_number] => 10/250093
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/250093 | Semiconductor antifuse with heating element | Jun 2, 2003 | Issued |
Array
(
[id] => 1022444
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[patent_title] => 'Display pixel having a capacitive electrode with different conductivity type from the switching element'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/442374 | Display pixel having a capacitive electrode with different conductivity type from the switching element | May 20, 2003 | Issued |
Array
(
[id] => 1074103
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[patent_title] => 'Module assembly for stacked BGA packages'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/435335 | Module assembly for stacked BGA packages | May 7, 2003 | Issued |
Array
(
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[patent_title] => 'DRAM cell structure capable of high integration and fabrication method thereof'
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Array
(
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/427623 | Individually adjustable back-bias technique | Apr 29, 2003 | Issued |
Array
(
[id] => 1171872
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[patent_title] => 'Solid state image sensor'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/424703 | Solid state image sensor | Apr 27, 2003 | Issued |
Array
(
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[patent_title] => 'Silicon carbide MOSFETs with integrated antiparallel junction barrier Schottky free wheeling diodes and methods of fabricating the same'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/422554 | Silicon carbide MOSFETs with integrated antiparallel junction barrier Schottky free wheeling diodes and methods of fabricating the same | Apr 23, 2003 | Issued |
Array
(
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/417193 | Light emitting element with multiple multi-layer reflectors and a barrier layers | Apr 16, 2003 | Issued |
Array
(
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[patent_title] => 'Random partitionable dot matrix LED display'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/412764 | Random partitionable dot matrix LED display | Apr 13, 2003 | Issued |
Array
(
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[patent_title] => 'NONVOLATILE MEMORIES WITH A FLOATING GATE HAVING AN UPWARD PROTRUSION'
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[pdf_file] => publications/A1/0201/20040201059.pdf
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/411813 | Nonvolatile memories with a floating gate having an upward protrusion | Apr 9, 2003 | Issued |