Search

Demetrios C. Kerveros

Examiner (ID: 7334, Phone: (571)272-3824 , Office: P/2117 )

Most Active Art Unit
2117
Art Unit(s)
2117, 2111, 2138, 2133, 2858
Total Applications
2023
Issued Applications
1687
Pending Applications
116
Abandoned Applications
233

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 17991979 [patent_doc_number] => 20220358016 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-11-10 [patent_title] => Storage System and Method for Data Recovery After Detection of an Uncorrectable Error [patent_app_type] => utility [patent_app_number] => 17/316189 [patent_app_country] => US [patent_app_date] => 2021-05-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10343 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 49 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17316189 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/316189
Storage system and method for data recovery after detection of an uncorrectable error May 9, 2021 Issued
Array ( [id] => 17086273 [patent_doc_number] => 20210281280 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-09-09 [patent_title] => DECODER PERFORMING ITERATIVE DECODING, AND STORAGE DEVICE USING THE SAME [patent_app_type] => utility [patent_app_number] => 17/314768 [patent_app_country] => US [patent_app_date] => 2021-05-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7705 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -3 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17314768 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/314768
Decoder performing iterative decoding, and storage device using the same May 6, 2021 Issued
Array ( [id] => 19609941 [patent_doc_number] => 12158814 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-12-03 [patent_title] => Granular voltage tuning [patent_app_type] => utility [patent_app_number] => 17/233097 [patent_app_country] => US [patent_app_date] => 2021-04-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 34 [patent_no_of_words] => 39231 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17233097 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/233097
Granular voltage tuning Apr 15, 2021 Issued
Array ( [id] => 19168274 [patent_doc_number] => 11984185 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-05-14 [patent_title] => Apparatuses and methods for zone-based soft post-package repair [patent_app_type] => utility [patent_app_number] => 17/224897 [patent_app_country] => US [patent_app_date] => 2021-04-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 11210 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17224897 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/224897
Apparatuses and methods for zone-based soft post-package repair Apr 6, 2021 Issued
Array ( [id] => 18527142 [patent_doc_number] => 11714132 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-08-01 [patent_title] => Test equipment diagnostics systems and methods [patent_app_type] => utility [patent_app_number] => 17/219297 [patent_app_country] => US [patent_app_date] => 2021-03-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4618 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 64 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17219297 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/219297
Test equipment diagnostics systems and methods Mar 30, 2021 Issued
Array ( [id] => 17971133 [patent_doc_number] => 11488680 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-11-01 [patent_title] => Test system including memory devices [patent_app_type] => utility [patent_app_number] => 17/187258 [patent_app_country] => US [patent_app_date] => 2021-02-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 6777 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17187258 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/187258
Test system including memory devices Feb 25, 2021 Issued
Array ( [id] => 18310308 [patent_doc_number] => 20230114208 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-04-13 [patent_title] => OUTPUT VOLTAGE GLITCH REDUCTION IN ATE SYSTEMS [patent_app_type] => utility [patent_app_number] => 17/904931 [patent_app_country] => US [patent_app_date] => 2021-02-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3863 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17904931 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/904931
Output voltage glitch reduction in ate systems Feb 23, 2021 Issued
Array ( [id] => 19029767 [patent_doc_number] => 11929130 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-03-12 [patent_title] => Method and device for testing sr cycle as well as method and device for testing ar number [patent_app_type] => utility [patent_app_number] => 17/440335 [patent_app_country] => US [patent_app_date] => 2021-01-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 13 [patent_no_of_words] => 11743 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 216 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17440335 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/440335
Method and device for testing sr cycle as well as method and device for testing ar number Jan 25, 2021 Issued
Array ( [id] => 16826397 [patent_doc_number] => 20210141690 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-05-13 [patent_title] => ERROR CORRECTION CODE (ECC) OPERATIONS IN MEMORY [patent_app_type] => utility [patent_app_number] => 17/157001 [patent_app_country] => US [patent_app_date] => 2021-01-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12625 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 168 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17157001 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/157001
Error correction code (ECC) operations in memory Jan 24, 2021 Issued
Array ( [id] => 18400973 [patent_doc_number] => 11663111 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-05-30 [patent_title] => Integrated circuit with state machine for pre-boot self-tests [patent_app_type] => utility [patent_app_number] => 17/138684 [patent_app_country] => US [patent_app_date] => 2020-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 15 [patent_no_of_words] => 6350 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 66 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17138684 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/138684
Integrated circuit with state machine for pre-boot self-tests Dec 29, 2020 Issued
Array ( [id] => 16765292 [patent_doc_number] => 20210110874 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-04-15 [patent_title] => MEMORY SYSTEM [patent_app_type] => utility [patent_app_number] => 17/131026 [patent_app_country] => US [patent_app_date] => 2020-12-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16560 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 227 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17131026 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/131026
Memory system Dec 21, 2020 Issued
Array ( [id] => 18686364 [patent_doc_number] => 11782093 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-10-10 [patent_title] => Detection system and detection method [patent_app_type] => utility [patent_app_number] => 17/123142 [patent_app_country] => US [patent_app_date] => 2020-12-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4259 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 169 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17123142 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/123142
Detection system and detection method Dec 15, 2020 Issued
Array ( [id] => 16887541 [patent_doc_number] => 20210173738 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-06-10 [patent_title] => Checker Cores for Fault Tolerant Processing [patent_app_type] => utility [patent_app_number] => 17/115776 [patent_app_country] => US [patent_app_date] => 2020-12-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6726 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -25 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17115776 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/115776
Checker cores for fault tolerant processing Dec 7, 2020 Issued
Array ( [id] => 16714130 [patent_doc_number] => 20210081277 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-03-18 [patent_title] => METHOD FOR ACCESSING FLASH MEMORY MODULE AND ASSOCIATED FLASH MEMORY CONTROLLER AND ELECTRONIC DEVICE [patent_app_type] => utility [patent_app_number] => 17/102442 [patent_app_country] => US [patent_app_date] => 2020-11-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2880 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 161 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17102442 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/102442
Method for accessing flash memory module and associated flash memory controller and electronic device Nov 23, 2020 Issued
Array ( [id] => 16849018 [patent_doc_number] => 20210149763 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-05-20 [patent_title] => SYSTEMS AND METHODS FOR ERROR DETECTION AND CONTROL FOR EMBEDDED MEMORY AND COMPUTE ELEMENTS [patent_app_type] => utility [patent_app_number] => 17/095530 [patent_app_country] => US [patent_app_date] => 2020-11-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 47129 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 52 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17095530 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/095530
Systems and methods for error detection and control for embedded memory and compute elements Nov 10, 2020 Issued
Array ( [id] => 18494596 [patent_doc_number] => 11700021 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-07-11 [patent_title] => Techniques to provide a cyclic redundancy check for low density parity check code codewords [patent_app_type] => utility [patent_app_number] => 17/093153 [patent_app_country] => US [patent_app_date] => 2020-11-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 14775 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17093153 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/093153
Techniques to provide a cyclic redundancy check for low density parity check code codewords Nov 8, 2020 Issued
Array ( [id] => 18025318 [patent_doc_number] => 20220376817 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-11-24 [patent_title] => METHODS AND SYSTEMS FOR EXCHANGING PERIODIC DATA IN A MOBILE TELECOMMUNICATIONS NETWORK [patent_app_type] => utility [patent_app_number] => 17/773842 [patent_app_country] => US [patent_app_date] => 2020-11-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11868 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17773842 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/773842
Methods and systems for exchanging periodic data in a mobile telecommunications network Nov 8, 2020 Issued
Array ( [id] => 17580999 [patent_doc_number] => 20220137854 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-05-05 [patent_title] => RATING MEMORY DEVICES BASED ON PERFORMANCE METRICS FOR VARIOUS TIMING MARGIN PARAMETER SETTINGS [patent_app_type] => utility [patent_app_number] => 17/088280 [patent_app_country] => US [patent_app_date] => 2020-11-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9915 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 172 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17088280 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/088280
RATING MEMORY DEVICES BASED ON PERFORMANCE METRICS FOR VARIOUS TIMING MARGIN PARAMETER SETTINGS Nov 2, 2020 Abandoned
Array ( [id] => 17581211 [patent_doc_number] => 20220138066 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-05-05 [patent_title] => SYSTEM AND METHOD FOR ERROR INJECTION IN SYSTEM-ON-CHIP [patent_app_type] => utility [patent_app_number] => 17/087537 [patent_app_country] => US [patent_app_date] => 2020-11-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9452 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 213 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17087537 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/087537
System and method for error injection in system-on-chip Nov 1, 2020 Issued
Array ( [id] => 17802039 [patent_doc_number] => 11416340 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2022-08-16 [patent_title] => Storage system with multiple storage types in a vast storage network [patent_app_type] => utility [patent_app_number] => 17/079891 [patent_app_country] => US [patent_app_date] => 2020-10-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 61 [patent_figures_cnt] => 70 [patent_no_of_words] => 40615 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17079891 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/079891
Storage system with multiple storage types in a vast storage network Oct 25, 2020 Issued
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