
Demetrios C. Kerveros
Examiner (ID: 7334, Phone: (571)272-3824 , Office: P/2117 )
| Most Active Art Unit | 2117 |
| Art Unit(s) | 2117, 2111, 2138, 2133, 2858 |
| Total Applications | 2023 |
| Issued Applications | 1687 |
| Pending Applications | 116 |
| Abandoned Applications | 233 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 15027693
[patent_doc_number] => 20190324851
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2019-10-24
[patent_title] => DECODING METHOD AND ASSOCIATED FLASH MEMORY CONTROLLER AND ELECTRONIC DEVICE
[patent_app_type] => utility
[patent_app_number] => 16/048311
[patent_app_country] => US
[patent_app_date] => 2018-07-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 4294
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -9
[patent_words_short_claim] => 218
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16048311
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/048311 | DECODING METHOD AND ASSOCIATED FLASH MEMORY CONTROLLER AND ELECTRONIC DEVICE | Jul 28, 2018 | Abandoned |
Array
(
[id] => 13529837
[patent_doc_number] => 20180316461
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2018-11-01
[patent_title] => System and Method for User Equipment Cooperation
[patent_app_type] => utility
[patent_app_number] => 16/029211
[patent_app_country] => US
[patent_app_date] => 2018-07-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6154
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 58
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16029211
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/029211 | System and method for user equipment cooperation | Jul 5, 2018 | Issued |
Array
(
[id] => 15271873
[patent_doc_number] => 20190384671
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2019-12-19
[patent_title] => SYSTEMS AND METHODS FOR ULTRA FAST ECC WITH PARITY
[patent_app_type] => utility
[patent_app_number] => 16/006894
[patent_app_country] => US
[patent_app_date] => 2018-06-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 10424
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 84
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16006894
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/006894 | Systems and methods for ultra fast ECC with parity | Jun 12, 2018 | Issued |
Array
(
[id] => 14724033
[patent_doc_number] => 20190253080
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2019-08-15
[patent_title] => GENERATING AND USING INVERTIBLE, SHORTENED BOSE-CHAUDHURI-HOCQUENGHEM CODEWORDS
[patent_app_type] => utility
[patent_app_number] => 16/007806
[patent_app_country] => US
[patent_app_date] => 2018-06-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 10325
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 116
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16007806
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/007806 | Generating and using invertible, shortened Bose-Chaudhuri-Hocquenghem codewords | Jun 12, 2018 | Issued |
Array
(
[id] => 15261333
[patent_doc_number] => 20190379400
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2019-12-12
[patent_title] => LOCATION SELECTION BASED ON ERASURE CODE TECHNIQUES
[patent_app_type] => utility
[patent_app_number] => 16/006376
[patent_app_country] => US
[patent_app_date] => 2018-06-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 9565
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 74
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16006376
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/006376 | Location selection based on erasure code techniques | Jun 11, 2018 | Issued |
Array
(
[id] => 16279932
[patent_doc_number] => 10762970
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2020-09-01
[patent_title] => Inspection method for memory integrity, nonvolatile memory and electronic device
[patent_app_type] => utility
[patent_app_number] => 15/981918
[patent_app_country] => US
[patent_app_date] => 2018-05-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 5
[patent_no_of_words] => 4704
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 273
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15981918
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/981918 | Inspection method for memory integrity, nonvolatile memory and electronic device | May 16, 2018 | Issued |
Array
(
[id] => 13569085
[patent_doc_number] => 20180336090
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2018-11-22
[patent_title] => Memory with Error Correction Function and an Error Correction Method
[patent_app_type] => utility
[patent_app_number] => 15/982131
[patent_app_country] => US
[patent_app_date] => 2018-05-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 2845
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -8
[patent_words_short_claim] => 227
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15982131
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/982131 | Memory with error correction function and an error correction method | May 16, 2018 | Issued |
Array
(
[id] => 15638681
[patent_doc_number] => 10592334
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2020-03-17
[patent_title] => Data storage device emphasizing parity sector processing of un-converged codewords
[patent_app_type] => utility
[patent_app_number] => 15/983016
[patent_app_country] => US
[patent_app_date] => 2018-05-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 10
[patent_no_of_words] => 2867
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 163
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15983016
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/983016 | Data storage device emphasizing parity sector processing of un-converged codewords | May 16, 2018 | Issued |
Array
(
[id] => 13569093
[patent_doc_number] => 20180336094
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2018-11-22
[patent_title] => Memory with Error Correction Function that is Compatible with Different Data Length and an Error Correction Method
[patent_app_type] => utility
[patent_app_number] => 15/982297
[patent_app_country] => US
[patent_app_date] => 2018-05-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 4459
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -16
[patent_words_short_claim] => 230
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15982297
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/982297 | Memory with error correction function that is compatible with different data length and an error correction method | May 16, 2018 | Issued |
Array
(
[id] => 13391057
[patent_doc_number] => 20180247071
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2018-08-30
[patent_title] => PASSWORD AUGMENTED ALL-OR-NOTHING TRANSFORM
[patent_app_type] => utility
[patent_app_number] => 15/967245
[patent_app_country] => US
[patent_app_date] => 2018-04-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 9821
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 201
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15967245
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/967245 | Password augmented all-or-nothin transform | Apr 29, 2018 | Issued |
Array
(
[id] => 16881793
[patent_doc_number] => 11031957
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2021-06-08
[patent_title] => Decoder performing iterative decoding, and storage device using the same
[patent_app_type] => utility
[patent_app_number] => 15/956960
[patent_app_country] => US
[patent_app_date] => 2018-04-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 16
[patent_figures_cnt] => 16
[patent_no_of_words] => 7677
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 146
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15956960
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/956960 | Decoder performing iterative decoding, and storage device using the same | Apr 18, 2018 | Issued |
Array
(
[id] => 13501127
[patent_doc_number] => 20180302106
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2018-10-18
[patent_title] => PIPELINED FORWARD ERROR CORRECTION FOR VECTOR SIGNALING CODE CHANNEL
[patent_app_type] => utility
[patent_app_number] => 15/954138
[patent_app_country] => US
[patent_app_date] => 2018-04-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 11449
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 177
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15954138
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/954138 | Pipelined forward error correction for vector signaling code channel | Apr 15, 2018 | Issued |
Array
(
[id] => 13991913
[patent_doc_number] => 20190065114
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2019-02-28
[patent_title] => MEMORY SYSTEM
[patent_app_type] => utility
[patent_app_number] => 15/952613
[patent_app_country] => US
[patent_app_date] => 2018-04-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 12385
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -12
[patent_words_short_claim] => 121
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15952613
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/952613 | Memory system | Apr 12, 2018 | Issued |
Array
(
[id] => 16065169
[patent_doc_number] => 10691534
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2020-06-23
[patent_title] => Data encoding method, data decoding method and storage controller
[patent_app_type] => utility
[patent_app_number] => 15/950184
[patent_app_country] => US
[patent_app_date] => 2018-04-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 8
[patent_no_of_words] => 8723
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 335
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15950184
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/950184 | Data encoding method, data decoding method and storage controller | Apr 10, 2018 | Issued |
Array
(
[id] => 16417645
[patent_doc_number] => 10825545
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2020-11-03
[patent_title] => Memory device loopback systems and methods
[patent_app_type] => utility
[patent_app_number] => 15/944455
[patent_app_country] => US
[patent_app_date] => 2018-04-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 11
[patent_no_of_words] => 7787
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 279
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15944455
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/944455 | Memory device loopback systems and methods | Apr 2, 2018 | Issued |
Array
(
[id] => 16250164
[patent_doc_number] => 10749547
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2020-08-18
[patent_title] => Error detector and/or corrector checker method and apparatus
[patent_app_type] => utility
[patent_app_number] => 15/938505
[patent_app_country] => US
[patent_app_date] => 2018-03-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 5207
[patent_no_of_claims] => 24
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 208
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15938505
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/938505 | Error detector and/or corrector checker method and apparatus | Mar 27, 2018 | Issued |
Array
(
[id] => 15638687
[patent_doc_number] => 10592337
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2020-03-17
[patent_title] => Systems and methods for distributing information across distributed storage devices
[patent_app_type] => utility
[patent_app_number] => 15/937754
[patent_app_country] => US
[patent_app_date] => 2018-03-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 5612
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 125
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15937754
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/937754 | Systems and methods for distributing information across distributed storage devices | Mar 26, 2018 | Issued |
Array
(
[id] => 13906311
[patent_doc_number] => 20190042360
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2019-02-07
[patent_title] => ERROR CORRECTION CIRCUIT AND MEMORY SYSTEM INCLUDING THE SAME
[patent_app_type] => utility
[patent_app_number] => 15/936684
[patent_app_country] => US
[patent_app_date] => 2018-03-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 3291
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -16
[patent_words_short_claim] => 93
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15936684
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/936684 | ERROR CORRECTION CIRCUIT AND MEMORY SYSTEM INCLUDING THE SAME | Mar 26, 2018 | Abandoned |
Array
(
[id] => 16200696
[patent_doc_number] => 10725859
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2020-07-28
[patent_title] => Parity generation offload using peer-to-peer data transfers in data storage system
[patent_app_type] => utility
[patent_app_number] => 15/936325
[patent_app_country] => US
[patent_app_date] => 2018-03-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
[patent_figures_cnt] => 16
[patent_no_of_words] => 18099
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 378
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15936325
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/936325 | Parity generation offload using peer-to-peer data transfers in data storage system | Mar 25, 2018 | Issued |
Array
(
[id] => 13453451
[patent_doc_number] => 20180278268
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2018-09-27
[patent_title] => METHOD FOR GENERATING A SEQUENCE FOR A POLA CODE AND MEDIUM THEREFOR AND METHOD AND APPARATUS FOR TRANSMITTING DATA USING THEREOF
[patent_app_type] => utility
[patent_app_number] => 15/934575
[patent_app_country] => US
[patent_app_date] => 2018-03-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 26624
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -15
[patent_words_short_claim] => 235
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15934575
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/934575 | Method for generating a sequence for a pola code and medium therefor and method and apparatus for transmitting data using thereof | Mar 22, 2018 | Issued |