Search

Denise Tran

Examiner (ID: 13667, Phone: (571)272-4189 , Office: P/2138 )

Most Active Art Unit
2138
Art Unit(s)
2318, 2138, 2185, 2188, 2186, 2302, 2752, 2189, 2312
Total Applications
671
Issued Applications
551
Pending Applications
19
Abandoned Applications
103

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 16683382 [patent_doc_number] => 10942860 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-03-09 [patent_title] => Computing system and method using bit counter [patent_app_type] => utility [patent_app_number] => 16/890706 [patent_app_country] => US [patent_app_date] => 2020-06-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 4821 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16890706 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/890706
Computing system and method using bit counter Jun 1, 2020 Issued
Array ( [id] => 15804265 [patent_doc_number] => 20200125275 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-04-23 [patent_title] => Data Storage Device and Method for Memory Operation and Iterative Polling [patent_app_type] => utility [patent_app_number] => 16/724078 [patent_app_country] => US [patent_app_date] => 2019-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7130 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16724078 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/724078
Data storage device and method for memory operation and iterative polling Dec 19, 2019 Issued
Array ( [id] => 17252975 [patent_doc_number] => 11188464 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-11-30 [patent_title] => System and method for self-invalidation, self-downgrade cachecoherence protocols [patent_app_type] => utility [patent_app_number] => 16/710203 [patent_app_country] => US [patent_app_date] => 2019-12-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 4803 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 135 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16710203 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/710203
System and method for self-invalidation, self-downgrade cachecoherence protocols Dec 10, 2019 Issued
Array ( [id] => 16615890 [patent_doc_number] => 20210034543 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-02-04 [patent_title] => HASH-BASED ONE-LEVEL MAPPING FOR STORAGE CLUSTERS [patent_app_type] => utility [patent_app_number] => 16/526641 [patent_app_country] => US [patent_app_date] => 2019-07-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7024 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 168 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16526641 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/526641
Hash-based one-level mapping for storage clusters Jul 29, 2019 Issued
Array ( [id] => 16508071 [patent_doc_number] => 20200387327 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-12-10 [patent_title] => DATA PROCESSING METHOD FOR COMPUTER SYSTEM WITH SOLID STATE DRIVE [patent_app_type] => utility [patent_app_number] => 16/515617 [patent_app_country] => US [patent_app_date] => 2019-07-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2799 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -8 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16515617 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/515617
Data processing method for computer system with solid state drive Jul 17, 2019 Issued
Array ( [id] => 15045133 [patent_doc_number] => 20190333571 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-10-31 [patent_title] => SYSTEMS AND METHODS FOR PERFORMING ROW HAMMER REFRESH OPERATIONS IN REDUNDANT MEMORY [patent_app_type] => utility [patent_app_number] => 16/508920 [patent_app_country] => US [patent_app_date] => 2019-07-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11471 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 137 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16508920 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/508920
Systems and methods for performing row hammer refresh operations in redundant memory Jul 10, 2019 Issued
Array ( [id] => 15027813 [patent_doc_number] => 20190324911 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-10-24 [patent_title] => REMOTE MEMORY OPERATIONS FOR COMPUTING SYSTEMS WITH SHARED MEMORY [patent_app_type] => utility [patent_app_number] => 16/457826 [patent_app_country] => US [patent_app_date] => 2019-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11301 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -22 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16457826 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/457826
Remote memory operations for computing systems with shared memory Jun 27, 2019 Issued
Array ( [id] => 16543139 [patent_doc_number] => 20200409554 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-12-31 [patent_title] => SYSTEMS AND METHODS FOR MANAGING PHYSICAL-TO-LOGICAL ADDRESS INFORMATION [patent_app_type] => utility [patent_app_number] => 16/455900 [patent_app_country] => US [patent_app_date] => 2019-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9776 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16455900 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/455900
Systems and methods for managing physical-to- logical address information Jun 27, 2019 Issued
Array ( [id] => 16942975 [patent_doc_number] => 11055217 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-07-06 [patent_title] => Using additional intermediate buffer queues to identify interleaved media data to be read together [patent_app_type] => utility [patent_app_number] => 16/425121 [patent_app_country] => US [patent_app_date] => 2019-05-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4036 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16425121 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/425121
Using additional intermediate buffer queues to identify interleaved media data to be read together May 28, 2019 Issued
Array ( [id] => 16486308 [patent_doc_number] => 20200379914 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-12-03 [patent_title] => Fine Grain Data Migration to or from Borrowed Memory [patent_app_type] => utility [patent_app_number] => 16/424427 [patent_app_country] => US [patent_app_date] => 2019-05-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 28583 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 239 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16424427 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/424427
Fine grain data migration to or from borrowed memory May 27, 2019 Issued
Array ( [id] => 16423650 [patent_doc_number] => 20200348848 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-11-05 [patent_title] => STORAGE MANAGEMENT SYSTEM AND METHOD [patent_app_type] => utility [patent_app_number] => 16/402761 [patent_app_country] => US [patent_app_date] => 2019-05-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5389 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 67 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16402761 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/402761
Storage management system and method May 2, 2019 Issued
Array ( [id] => 16910335 [patent_doc_number] => 11042374 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-06-22 [patent_title] => Non-volatile dual in-line memory module storage [patent_app_type] => utility [patent_app_number] => 16/401358 [patent_app_country] => US [patent_app_date] => 2019-05-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5459 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16401358 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/401358
Non-volatile dual in-line memory module storage May 1, 2019 Issued
Array ( [id] => 17091498 [patent_doc_number] => 11119686 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-09-14 [patent_title] => Preservation of data during scaling of a geographically diverse data storage system [patent_app_type] => utility [patent_app_number] => 16/399902 [patent_app_country] => US [patent_app_date] => 2019-04-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 15485 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 136 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16399902 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/399902
Preservation of data during scaling of a geographically diverse data storage system Apr 29, 2019 Issued
Array ( [id] => 17001154 [patent_doc_number] => 11079964 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-08-03 [patent_title] => Memory system [patent_app_type] => utility [patent_app_number] => 16/391606 [patent_app_country] => US [patent_app_date] => 2019-04-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 10 [patent_no_of_words] => 5809 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16391606 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/391606
Memory system Apr 22, 2019 Issued
Array ( [id] => 16446718 [patent_doc_number] => 10838645 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-11-17 [patent_title] => Memory writing operations with consideration for thermal thresholds [patent_app_type] => utility [patent_app_number] => 16/390856 [patent_app_country] => US [patent_app_date] => 2019-04-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 7731 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 161 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16390856 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/390856
Memory writing operations with consideration for thermal thresholds Apr 21, 2019 Issued
Array ( [id] => 16772811 [patent_doc_number] => 10983918 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-04-20 [patent_title] => Hybrid logical to physical caching scheme [patent_app_type] => utility [patent_app_number] => 16/294427 [patent_app_country] => US [patent_app_date] => 2019-03-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 12 [patent_no_of_words] => 13916 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 172 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16294427 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/294427
Hybrid logical to physical caching scheme Mar 5, 2019 Issued
Array ( [id] => 16285339 [patent_doc_number] => 20200278941 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-09-03 [patent_title] => PRIORITY SCHEDULING IN QUEUES TO ACCESS CACHE DATA IN A MEMORY SUB-SYSTEM [patent_app_type] => utility [patent_app_number] => 16/289478 [patent_app_country] => US [patent_app_date] => 2019-02-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 18785 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16289478 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/289478
Priority scheduling in queues to access cache data in a memory sub-system Feb 27, 2019 Issued
Array ( [id] => 16224984 [patent_doc_number] => 20200250101 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-08-06 [patent_title] => SYSTEM AND METHOD FOR INTELLIGENT TILE-BASED MEMORY BANDWIDTH MANAGEMENT [patent_app_type] => utility [patent_app_number] => 16/269399 [patent_app_country] => US [patent_app_date] => 2019-02-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8347 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -26 [patent_words_short_claim] => 149 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16269399 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/269399
SYSTEM AND METHOD FOR INTELLIGENT TILE-BASED MEMORY BANDWIDTH MANAGEMENT Feb 5, 2019 Abandoned
Array ( [id] => 16683381 [patent_doc_number] => 10942859 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-03-09 [patent_title] => Computing system and method using bit counter [patent_app_type] => utility [patent_app_number] => 16/265796 [patent_app_country] => US [patent_app_date] => 2019-02-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 4798 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16265796 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/265796
Computing system and method using bit counter Jan 31, 2019 Issued
Array ( [id] => 14347329 [patent_doc_number] => 20190155637 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-05-23 [patent_title] => Resource Access Method Applied to Computer and Computer [patent_app_type] => utility [patent_app_number] => 16/251883 [patent_app_country] => US [patent_app_date] => 2019-01-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16164 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 143 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16251883 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/251883
Resource access method applied to computer and computer Jan 17, 2019 Issued
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