Denise Tran

Array ( [id] => 1526460 [patent_doc_number] => 06353872 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-03-05 [patent_title] => 'Memory interface circuit' [patent_app_type] => B1 [patent_app_number] => 09/228567 [patent_app_country] => US [patent_app_date] => 1999-01-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 6500 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 226 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/353/06353872.pdf [firstpage_image] =>[orig_patent_app_number] => 09228567 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4412377 [patent_doc_number] => 06298425 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-10-02 [patent_title] => 'Computer disk management system using doublet A-B logging' [patent_app_type] => 1 [patent_app_number] => 9/228662 [patent_app_country] => US [patent_app_date] => 1999-01-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 12143 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 148 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/298/06298425.pdf [firstpage_image] =>[orig_patent_app_number] => 228662 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1314386 [patent_doc_number] => 06622214 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-09-16 [patent_title] => 'System and method for maintaining memory coherency in a computer system having multiple system buses' [patent_app_type] => B1 [patent_app_number] => 09/228665 [patent_app_country] => US [patent_app_date] => 1999-01-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 23644 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/622/06622214.pdf [firstpage_image] =>[orig_patent_app_number] => 09228665 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4312133 [patent_doc_number] => 06237061 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-05-22 [patent_title] => 'Method for longest prefix matching in a content addressable memory' [patent_app_type] => 1 [patent_app_number] => 9/225918 [patent_app_country] => US [patent_app_date] => 1999-01-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 9 [patent_no_of_words] => 3728 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 187 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/237/06237061.pdf [firstpage_image] =>[orig_patent_app_number] => 225918 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4085195 [patent_doc_number] => 06009497 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-12-28 [patent_title] => 'Method and apparatus for updating flash memory resident firmware through a standard disk drive interface' [patent_app_type] => 1 [patent_app_number] => 9/189000 [patent_app_country] => US [patent_app_date] => 1998-11-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3928 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 184 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/009/06009497.pdf [firstpage_image] =>[orig_patent_app_number] => 189000 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4427306 [patent_doc_number] => 06226729 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-05-01 [patent_title] => 'Method and apparatus for configuring and initializing a memory device and a memory channel' [patent_app_type] => 1 [patent_app_number] => 9/186051 [patent_app_country] => US [patent_app_date] => 1998-11-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 9930 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/226/06226729.pdf [firstpage_image] =>[orig_patent_app_number] => 186051 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4162410 [patent_doc_number] => 06032236 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-02-29 [patent_title] => 'Data backup system in terminal device connected to data communications network' [patent_app_type] => 1 [patent_app_number] => 9/154467 [patent_app_country] => US [patent_app_date] => 1998-09-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3827 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 230 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/032/06032236.pdf [firstpage_image] =>[orig_patent_app_number] => 154467 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4147402 [patent_doc_number] => 06128697 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-10-03 [patent_title] => 'Selectively updateable mapped data storage system' [patent_app_type] => 1 [patent_app_number] => 9/123630 [patent_app_country] => US [patent_app_date] => 1998-07-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 8 [patent_no_of_words] => 4342 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 202 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/128/06128697.pdf [firstpage_image] =>[orig_patent_app_number] => 123630 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7621144 [patent_doc_number] => 06978357 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2005-12-20 [patent_title] => 'Method and apparatus for performing cache segment flush and cache segment invalidation operations' [patent_app_type] => utility [patent_app_number] => 09/122349 [patent_app_country] => US [patent_app_date] => 1998-07-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 3936 [patent_no_of_claims] => 38 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/978/06978357.pdf [firstpage_image] =>[orig_patent_app_number] => 09122349 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4257685 [patent_doc_number] => 06145063 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-11-07 [patent_title] => 'Memory system and information processing system' [patent_app_type] => 1 [patent_app_number] => 9/120730 [patent_app_country] => US [patent_app_date] => 1998-07-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4224 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 258 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/145/06145063.pdf [firstpage_image] =>[orig_patent_app_number] => 120730 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4279890 [patent_doc_number] => 06205525 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-03-20 [patent_title] => 'System for supplying data steams' [patent_app_type] => 1 [patent_app_number] => 9/106712 [patent_app_country] => US [patent_app_date] => 1998-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 8539 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 258 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/205/06205525.pdf [firstpage_image] =>[orig_patent_app_number] => 106712 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4152404 [patent_doc_number] => 06148365 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-11-14 [patent_title] => 'Dual pointer circular queue' [patent_app_type] => 1 [patent_app_number] => 9/107030 [patent_app_country] => US [patent_app_date] => 1998-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 1998 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/148/06148365.pdf [firstpage_image] =>[orig_patent_app_number] => 107030 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1429862 [patent_doc_number] => 06510504 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-01-21 [patent_title] => 'Methods and apparatus for memory allocation for object instances in an object-oriented software environment' [patent_app_type] => B2 [patent_app_number] => 09/106652 [patent_app_country] => US [patent_app_date] => 1998-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5569 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 162 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/510/06510504.pdf [firstpage_image] =>[orig_patent_app_number] => 09106652 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4373961 [patent_doc_number] => 06202147 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-03-13 [patent_title] => 'Platform-independent device drivers' [patent_app_type] => 1 [patent_app_number] => 9/107047 [patent_app_country] => US [patent_app_date] => 1998-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 6052 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/202/06202147.pdf [firstpage_image] =>[orig_patent_app_number] => 107047 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4317699 [patent_doc_number] => 06185657 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-02-06 [patent_title] => 'Multi-way cache apparatus and method' [patent_app_type] => 1 [patent_app_number] => 9/062571 [patent_app_country] => US [patent_app_date] => 1998-04-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2798 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 49 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/185/06185657.pdf [firstpage_image] =>[orig_patent_app_number] => 062571 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1466180 [patent_doc_number] => 06393520 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2002-05-21 [patent_title] => 'Data processor and data processing system with internal memories' [patent_app_type] => B2 [patent_app_number] => 09/061331 [patent_app_country] => US [patent_app_date] => 1998-04-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 7818 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 206 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/393/06393520.pdf [firstpage_image] =>[orig_patent_app_number] => 09061331 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4349631 [patent_doc_number] => 06321302 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-11-20 [patent_title] => 'Stream read buffer for efficient interface with block oriented devices' [patent_app_type] => 1 [patent_app_number] => 9/060843 [patent_app_country] => US [patent_app_date] => 1998-04-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 5658 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 224 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/321/06321302.pdf [firstpage_image] =>[orig_patent_app_number] => 060843 [rel_patent_id] =>[rel_patent_doc_number] =>)