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Derrick Edward Holland

Examiner (ID: 404, Phone: (571)272-3089 , Office: P/2912 )

Most Active Art Unit
2912
Art Unit(s)
2912
Total Applications
3302
Issued Applications
3253
Pending Applications
21
Abandoned Applications
28

Applications

Application numberTitle of the applicationFiling DateStatus
07/545114 MASK ROM WITH SPARE MEMORY CELLS Jun 26, 1990 Abandoned
Array ( [id] => 2948096 [patent_doc_number] => 05247638 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-09-21 [patent_title] => 'Apparatus for compressing data in a dynamically mapped virtual data storage subsystem' [patent_app_type] => 1 [patent_app_number] => 7/540219 [patent_app_country] => US [patent_app_date] => 1990-06-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 10614 [patent_no_of_claims] => 43 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 159 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/247/05247638.pdf [firstpage_image] =>[orig_patent_app_number] => 540219 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/540219
Apparatus for compressing data in a dynamically mapped virtual data storage subsystem Jun 17, 1990 Issued
Array ( [id] => 3023118 [patent_doc_number] => 05282274 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-01-25 [patent_title] => 'Translation of multiple virtual pages upon a TLB miss' [patent_app_type] => 1 [patent_app_number] => 7/528634 [patent_app_country] => US [patent_app_date] => 1990-05-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 12755 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/282/05282274.pdf [firstpage_image] =>[orig_patent_app_number] => 528634 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/528634
Translation of multiple virtual pages upon a TLB miss May 23, 1990 Issued
Array ( [id] => 3028337 [patent_doc_number] => 05341484 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-08-23 [patent_title] => 'Virtual machine system having an extended storage' [patent_app_type] => 1 [patent_app_number] => 7/476434 [patent_app_country] => US [patent_app_date] => 1990-05-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 21 [patent_no_of_words] => 11715 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 218 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/341/05341484.pdf [firstpage_image] =>[orig_patent_app_number] => 476434 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/476434
Virtual machine system having an extended storage May 23, 1990 Issued
Array ( [id] => 2785851 [patent_doc_number] => 05132937 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-07-21 [patent_title] => 'Semiconductor memory device having on-chip test circuit and operating method thereof' [patent_app_type] => 1 [patent_app_number] => 7/527205 [patent_app_country] => US [patent_app_date] => 1990-05-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 19 [patent_no_of_words] => 3406 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 172 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/132/05132937.pdf [firstpage_image] =>[orig_patent_app_number] => 527205 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/527205
Semiconductor memory device having on-chip test circuit and operating method thereof May 22, 1990 Issued
Array ( [id] => 3023914 [patent_doc_number] => 05276827 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-01-04 [patent_title] => 'Data buffer for the duration of cyclically recurrent buffer periods' [patent_app_type] => 1 [patent_app_number] => 7/527997 [patent_app_country] => US [patent_app_date] => 1990-05-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 3646 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 205 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/276/05276827.pdf [firstpage_image] =>[orig_patent_app_number] => 527997 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/527997
Data buffer for the duration of cyclically recurrent buffer periods May 21, 1990 Issued
Array ( [id] => 2929849 [patent_doc_number] => 05193161 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-03-09 [patent_title] => 'Computer system having mode independent addressing' [patent_app_type] => 1 [patent_app_number] => 7/525792 [patent_app_country] => US [patent_app_date] => 1990-05-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 10 [patent_no_of_words] => 3339 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 205 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/193/05193161.pdf [firstpage_image] =>[orig_patent_app_number] => 525792 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/525792
Computer system having mode independent addressing May 17, 1990 Issued
07/523425 SEMICONDUCTOR MEMORY DEVICE May 14, 1990 Abandoned
Array ( [id] => 2857741 [patent_doc_number] => 05107459 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-04-21 [patent_title] => 'Stacked bit-line architecture for high density cross-point memory cell array' [patent_app_type] => 1 [patent_app_number] => 7/513315 [patent_app_country] => US [patent_app_date] => 1990-04-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 4383 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 206 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/107/05107459.pdf [firstpage_image] =>[orig_patent_app_number] => 513315 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/513315
Stacked bit-line architecture for high density cross-point memory cell array Apr 19, 1990 Issued
07/512496 WORD PROCESSOR Apr 19, 1990 Abandoned
Array ( [id] => 3062725 [patent_doc_number] => 05283875 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-02-01 [patent_title] => 'Method and apparatus for optimizing prefetch caching by reverse ordering of logical blocks' [patent_app_type] => 1 [patent_app_number] => 7/509037 [patent_app_country] => US [patent_app_date] => 1990-04-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 8728 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 215 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/283/05283875.pdf [firstpage_image] =>[orig_patent_app_number] => 509037 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/509037
Method and apparatus for optimizing prefetch caching by reverse ordering of logical blocks Apr 12, 1990 Issued
07/507685 N-WORD WRITE ACCESS MEMORY Apr 10, 1990 Abandoned
Array ( [id] => 2703230 [patent_doc_number] => 05020027 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-05-28 [patent_title] => 'Memory cell with active write load' [patent_app_type] => 1 [patent_app_number] => 7/505955 [patent_app_country] => US [patent_app_date] => 1990-04-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3402 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 221 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/020/05020027.pdf [firstpage_image] =>[orig_patent_app_number] => 505955 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/505955
Memory cell with active write load Apr 5, 1990 Issued
Array ( [id] => 2946743 [patent_doc_number] => 05197139 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-03-23 [patent_title] => 'Cache management for multi-processor systems utilizing bulk cross-invalidate' [patent_app_type] => 1 [patent_app_number] => 7/505198 [patent_app_country] => US [patent_app_date] => 1990-04-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 5393 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 185 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/197/05197139.pdf [firstpage_image] =>[orig_patent_app_number] => 505198 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/505198
Cache management for multi-processor systems utilizing bulk cross-invalidate Apr 4, 1990 Issued
07/503765 BIT- LINE DRIVE CIRCUIT FOR A SEMICONDUCTOR MEMORY Apr 2, 1990 Abandoned
Array ( [id] => 2861845 [patent_doc_number] => 05134585 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-07-28 [patent_title] => 'Circuit for repairing defective bit in semiconductor memory device and repairing method' [patent_app_type] => 1 [patent_app_number] => 7/500965 [patent_app_country] => US [patent_app_date] => 1990-03-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 17 [patent_no_of_words] => 13781 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 295 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/134/05134585.pdf [firstpage_image] =>[orig_patent_app_number] => 500965 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/500965
Circuit for repairing defective bit in semiconductor memory device and repairing method Mar 28, 1990 Issued
Array ( [id] => 2770143 [patent_doc_number] => 05060194 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-10-22 [patent_title] => 'Semiconductor memory device having a BICMOS memory cell' [patent_app_type] => 1 [patent_app_number] => 7/501865 [patent_app_country] => US [patent_app_date] => 1990-03-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 36 [patent_no_of_words] => 9493 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 184 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/060/05060194.pdf [firstpage_image] =>[orig_patent_app_number] => 501865 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/501865
Semiconductor memory device having a BICMOS memory cell Mar 27, 1990 Issued
07/499715 HIGH SPEED, MULTI-PORT BICMOS MEMORY CELL UTILIZABLE IN A BICMOS MEMORY ARRAY Mar 26, 1990 Abandoned
Array ( [id] => 2889026 [patent_doc_number] => 05119330 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-06-02 [patent_title] => 'Nonvolatile memory system for multiple value storing' [patent_app_type] => 1 [patent_app_number] => 7/498685 [patent_app_country] => US [patent_app_date] => 1990-03-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 19 [patent_no_of_words] => 8022 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 337 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/119/05119330.pdf [firstpage_image] =>[orig_patent_app_number] => 498685 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/498685
Nonvolatile memory system for multiple value storing Mar 25, 1990 Issued
07/498007 VIRTUAL MEMORY MANAGEMENT AND ALLOCATION ARRANGEMENT FOR DIGITAL DATA SYSTEM Mar 22, 1990 Abandoned
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