Search

Derrick Edward Holland

Examiner (ID: 404, Phone: (571)272-3089 , Office: P/2912 )

Most Active Art Unit
2912
Art Unit(s)
2912
Total Applications
3302
Issued Applications
3253
Pending Applications
21
Abandoned Applications
28

Applications

Application numberTitle of the applicationFiling DateStatus
07/708716 REDUNDANT CIRCUIT FOR A CIRCUIT HAVING A PLURALITY OF MEMORY CELL BLOCKS May 30, 1991 Abandoned
Array ( [id] => 2859405 [patent_doc_number] => 05105385 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-04-14 [patent_title] => 'Cell array pattern layout for EEPROM device' [patent_app_type] => 1 [patent_app_number] => 7/703704 [patent_app_country] => US [patent_app_date] => 1991-05-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 13 [patent_no_of_words] => 4019 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 236 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/105/05105385.pdf [firstpage_image] =>[orig_patent_app_number] => 703704 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/703704
Cell array pattern layout for EEPROM device May 20, 1991 Issued
07/704733 RANDOM ACCESS MEMORY WITH DIVIDED MEMORY BANKS AND DATA READ/WRITE ARCHITECTURE THEREFOR May 19, 1991 Abandoned
Array ( [id] => 2947945 [patent_doc_number] => 05247631 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-09-21 [patent_title] => 'Programmable control of EMS page register addresses' [patent_app_type] => 1 [patent_app_number] => 7/689216 [patent_app_country] => US [patent_app_date] => 1991-04-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 4213 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 190 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/247/05247631.pdf [firstpage_image] =>[orig_patent_app_number] => 689216 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/689216
Programmable control of EMS page register addresses Apr 21, 1991 Issued
07/676624 FOUR-BIT BLOCK WRITE FOR A WIDE INPUT/OUTPUT RANDOM ACCESS MEMORY IN A DATA PROCESSING SYSTEM Mar 27, 1991 Abandoned
Array ( [id] => 2785797 [patent_doc_number] => 05132934 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-07-21 [patent_title] => 'Method and apparatus for storing digital information in the form of stored charges' [patent_app_type] => 1 [patent_app_number] => 7/668320 [patent_app_country] => US [patent_app_date] => 1991-03-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 10 [patent_no_of_words] => 4494 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 12 [patent_words_short_claim] => 191 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/132/05132934.pdf [firstpage_image] =>[orig_patent_app_number] => 668320 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/668320
Method and apparatus for storing digital information in the form of stored charges Mar 12, 1991 Issued
Array ( [id] => 2703964 [patent_doc_number] => 05065365 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-11-12 [patent_title] => 'Semiconductor memory device carrying out reading and writing operations in order in one operating cycle and operating method therefor' [patent_app_type] => 1 [patent_app_number] => 7/663787 [patent_app_country] => US [patent_app_date] => 1991-03-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 14 [patent_no_of_words] => 4833 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 274 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/065/05065365.pdf [firstpage_image] =>[orig_patent_app_number] => 663787 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/663787
Semiconductor memory device carrying out reading and writing operations in order in one operating cycle and operating method therefor Mar 3, 1991 Issued
Array ( [id] => 3465163 [patent_doc_number] => 05379391 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-01-03 [patent_title] => 'Method and apparatus to access data records in a cache memory by multiple virtual addresses' [patent_app_type] => 1 [patent_app_number] => 7/663099 [patent_app_country] => US [patent_app_date] => 1991-03-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 7712 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 226 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/379/05379391.pdf [firstpage_image] =>[orig_patent_app_number] => 663099 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/663099
Method and apparatus to access data records in a cache memory by multiple virtual addresses Feb 28, 1991 Issued
07/660989 NONVOLATILE MEMORY ELEMENT COMPOSED OF COMBINED SUPERCONDUCTOR RING AND MOSFET Feb 26, 1991 Abandoned
Array ( [id] => 3007318 [patent_doc_number] => 05367648 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-11-22 [patent_title] => 'General purpose memory access scheme using register-indirect mode' [patent_app_type] => 1 [patent_app_number] => 7/659717 [patent_app_country] => US [patent_app_date] => 1991-02-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 7475 [patent_no_of_claims] => 35 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 135 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/367/05367648.pdf [firstpage_image] =>[orig_patent_app_number] => 659717 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/659717
General purpose memory access scheme using register-indirect mode Feb 19, 1991 Issued
Array ( [id] => 3032181 [patent_doc_number] => 05327380 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-07-05 [patent_title] => 'Method and apparatus for inhibiting a predecoder when selecting a redundant row line' [patent_app_type] => 1 [patent_app_number] => 7/653855 [patent_app_country] => US [patent_app_date] => 1991-02-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 5926 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 142 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/327/05327380.pdf [firstpage_image] =>[orig_patent_app_number] => 653855 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/653855
Method and apparatus for inhibiting a predecoder when selecting a redundant row line Feb 7, 1991 Issued
07/644751 DIRECT MEMORY ACCESS SYSTEM Jan 22, 1991 Abandoned
07/638153 NAND TYPE EEPROM AND OPERATING METHOD THEREFOR Jan 8, 1991 Abandoned
07/639309 PROCESSING SYSTEM USING MULTILINE CACHE DRAM Jan 6, 1991 Abandoned
07/638338 REFERENCE SWITCHING CIRCUIT FOR FLASH EPROM Jan 3, 1991 Abandoned
Array ( [id] => 3049752 [patent_doc_number] => 05301286 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-04-05 [patent_title] => 'Memory archiving indexing arrangement' [patent_app_type] => 1 [patent_app_number] => 7/636310 [patent_app_country] => US [patent_app_date] => 1991-01-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 4780 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 199 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/301/05301286.pdf [firstpage_image] =>[orig_patent_app_number] => 636310 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/636310
Memory archiving indexing arrangement Jan 1, 1991 Issued
07/635988 DISK EMULATION FOR A NON-VOLATILE SEMICONDUCTOR MEMORY UTILIZING CLUSTER MAPPING TABLE Dec 30, 1990 Abandoned
Array ( [id] => 3063319 [patent_doc_number] => 05305444 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-04-19 [patent_title] => 'Apparatus for increasing the number of hits in a translation lookaside buffer including instruction address lookaside register' [patent_app_type] => 1 [patent_app_number] => 7/633460 [patent_app_country] => US [patent_app_date] => 1990-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 1 [patent_no_of_words] => 3531 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/305/05305444.pdf [firstpage_image] =>[orig_patent_app_number] => 633460 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/633460
Apparatus for increasing the number of hits in a translation lookaside buffer including instruction address lookaside register Dec 20, 1990 Issued
Array ( [id] => 3107027 [patent_doc_number] => 05313605 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-05-17 [patent_title] => 'High bandwith output hierarchical memory store including a cache, fetch buffer and ROM' [patent_app_type] => 1 [patent_app_number] => 7/630534 [patent_app_country] => US [patent_app_date] => 1990-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 6349 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 241 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/313/05313605.pdf [firstpage_image] =>[orig_patent_app_number] => 630534 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/630534
High bandwith output hierarchical memory store including a cache, fetch buffer and ROM Dec 19, 1990 Issued
Array ( [id] => 2961561 [patent_doc_number] => 05222222 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-06-22 [patent_title] => 'Apparatus and method for a space saving translation lookaside buffer for content addressable memory' [patent_app_type] => 1 [patent_app_number] => 7/629258 [patent_app_country] => US [patent_app_date] => 1990-12-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2254 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 309 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/222/05222222.pdf [firstpage_image] =>[orig_patent_app_number] => 629258 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/629258
Apparatus and method for a space saving translation lookaside buffer for content addressable memory Dec 17, 1990 Issued
Menu