Search

Derrick V. Rose

Examiner (ID: 2179, Phone: (571)270-7460 , Office: P/2462 )

Most Active Art Unit
2462
Art Unit(s)
2462
Total Applications
616
Issued Applications
482
Pending Applications
56
Abandoned Applications
87

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 17456703 [patent_doc_number] => 11271574 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2022-03-08 [patent_title] => Frequency synthesizer with selectable modes [patent_app_type] => utility [patent_app_number] => 17/197827 [patent_app_country] => US [patent_app_date] => 2021-03-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 14 [patent_no_of_words] => 8512 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17197827 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/197827
Frequency synthesizer with selectable modes Mar 9, 2021 Issued
Array ( [id] => 18317955 [patent_doc_number] => 11632047 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-04-18 [patent_title] => Electronic circuit, module, and system [patent_app_type] => utility [patent_app_number] => 17/183994 [patent_app_country] => US [patent_app_date] => 2021-02-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 25 [patent_no_of_words] => 16720 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 434 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17183994 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/183994
Electronic circuit, module, and system Feb 23, 2021 Issued
Array ( [id] => 17638718 [patent_doc_number] => 11349457 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-05-31 [patent_title] => Signal generation circuit having minimum delay, semiconductor apparatus using the same, and signal generation method [patent_app_type] => utility [patent_app_number] => 17/170417 [patent_app_country] => US [patent_app_date] => 2021-02-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 14931 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17170417 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/170417
Signal generation circuit having minimum delay, semiconductor apparatus using the same, and signal generation method Feb 7, 2021 Issued
Array ( [id] => 18054618 [patent_doc_number] => 11528015 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-12-13 [patent_title] => Level shifter with reduced duty cycle variation [patent_app_type] => utility [patent_app_number] => 17/161546 [patent_app_country] => US [patent_app_date] => 2021-01-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 12 [patent_no_of_words] => 4649 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 169 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17161546 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/161546
Level shifter with reduced duty cycle variation Jan 27, 2021 Issued
Array ( [id] => 18106077 [patent_doc_number] => 11545983 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-01-03 [patent_title] => Systems and methods for phase locked loop realignment with skew cancellation [patent_app_type] => utility [patent_app_number] => 17/159335 [patent_app_country] => US [patent_app_date] => 2021-01-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3705 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17159335 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/159335
Systems and methods for phase locked loop realignment with skew cancellation Jan 26, 2021 Issued
Array ( [id] => 16982375 [patent_doc_number] => 20210226612 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-07-22 [patent_title] => SYSTEM AND METHOD FOR IMPROVED RF PULSE WIDTH MODULATION [patent_app_type] => utility [patent_app_number] => 17/154437 [patent_app_country] => US [patent_app_date] => 2021-01-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9797 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 74 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17154437 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/154437
System and method for improved RF pulse width modulation Jan 20, 2021 Issued
Array ( [id] => 20376421 [patent_doc_number] => 12483874 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-11-25 [patent_title] => Communication network node, user equipment, communication network, method [patent_app_type] => utility [patent_app_number] => 17/785398 [patent_app_country] => US [patent_app_date] => 2021-01-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 11 [patent_no_of_words] => 6781 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17785398 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/785398
Communication network node, user equipment, communication network, method Jan 20, 2021 Issued
Array ( [id] => 17753473 [patent_doc_number] => 20220231678 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-07-21 [patent_title] => OFF CHIP DRIVER CIRCUIT, OFF CHIP DRIVER SYSTEM, AND METHOD FOR MANUFACTURING AN OFF CHIP DRIVER CIRCUIT [patent_app_type] => utility [patent_app_number] => 17/153897 [patent_app_country] => US [patent_app_date] => 2021-01-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7296 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17153897 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/153897
Off chip driver circuit, off chip driver system, and method for manufacturing an off chip driver circuit Jan 20, 2021 Issued
Array ( [id] => 17108074 [patent_doc_number] => 11128305 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2021-09-21 [patent_title] => Field programmable gate array with external phase-locked loop [patent_app_type] => utility [patent_app_number] => 17/248304 [patent_app_country] => US [patent_app_date] => 2021-01-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 31 [patent_no_of_words] => 15977 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 776 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17248304 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/248304
Field programmable gate array with external phase-locked loop Jan 18, 2021 Issued
Array ( [id] => 18702630 [patent_doc_number] => 11789137 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-10-17 [patent_title] => FMCW chirp bandwidth control [patent_app_type] => utility [patent_app_number] => 17/138549 [patent_app_country] => US [patent_app_date] => 2020-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 4863 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 158 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17138549 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/138549
FMCW chirp bandwidth control Dec 29, 2020 Issued
Array ( [id] => 16782022 [patent_doc_number] => 20210119101 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-04-22 [patent_title] => HIGH-SATURATION POWER JOSEPHSON RING MODULATORS [patent_app_type] => utility [patent_app_number] => 17/135631 [patent_app_country] => US [patent_app_date] => 2020-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9924 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 58 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17135631 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/135631
High-saturation power Josephson ring modulators Dec 27, 2020 Issued
Array ( [id] => 17003249 [patent_doc_number] => 11082080 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2021-08-03 [patent_title] => Transceiver circuit [patent_app_type] => utility [patent_app_number] => 17/134779 [patent_app_country] => US [patent_app_date] => 2020-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 3279 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 281 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17134779 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/134779
Transceiver circuit Dec 27, 2020 Issued
Array ( [id] => 17788424 [patent_doc_number] => 11411565 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-08-09 [patent_title] => Clock and data recovery circuit [patent_app_type] => utility [patent_app_number] => 17/131917 [patent_app_country] => US [patent_app_date] => 2020-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 11 [patent_no_of_words] => 8018 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17131917 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/131917
Clock and data recovery circuit Dec 22, 2020 Issued
Array ( [id] => 17501400 [patent_doc_number] => 11290118 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-03-29 [patent_title] => Frequency synthesizer [patent_app_type] => utility [patent_app_number] => 17/128791 [patent_app_country] => US [patent_app_date] => 2020-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 4388 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17128791 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/128791
Frequency synthesizer Dec 20, 2020 Issued
Array ( [id] => 17138246 [patent_doc_number] => 11139818 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2021-10-05 [patent_title] => Fast-locking phase-locked loop and associated fast-locking method thereof [patent_app_type] => utility [patent_app_number] => 17/124518 [patent_app_country] => US [patent_app_date] => 2020-12-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 10 [patent_no_of_words] => 6782 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17124518 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/124518
Fast-locking phase-locked loop and associated fast-locking method thereof Dec 16, 2020 Issued
Array ( [id] => 17041362 [patent_doc_number] => 20210257998 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-08-19 [patent_title] => Extending On-Time for Power Converter Control [patent_app_type] => utility [patent_app_number] => 17/247536 [patent_app_country] => US [patent_app_date] => 2020-12-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9258 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17247536 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/247536
Extending on-time for power converter control Dec 14, 2020 Issued
Array ( [id] => 18292829 [patent_doc_number] => 11621705 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-04-04 [patent_title] => Semiconductor integrated circuit device and level shifter circuit [patent_app_type] => utility [patent_app_number] => 17/122737 [patent_app_country] => US [patent_app_date] => 2020-12-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 14 [patent_no_of_words] => 8407 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 195 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17122737 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/122737
Semiconductor integrated circuit device and level shifter circuit Dec 14, 2020 Issued
Array ( [id] => 16905770 [patent_doc_number] => 20210184686 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-06-17 [patent_title] => DIVIDERLESS PLL WITH SAMPLED LOWPASS FILTER STRUCTURE [patent_app_type] => utility [patent_app_number] => 17/121074 [patent_app_country] => US [patent_app_date] => 2020-12-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6990 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 148 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17121074 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/121074
Dividerless PLL with sampled lowpass filter structure Dec 13, 2020 Issued
Array ( [id] => 16921374 [patent_doc_number] => 20210194466 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-06-24 [patent_title] => SWITCH CONTROL CLAMPING [patent_app_type] => utility [patent_app_number] => 17/121480 [patent_app_country] => US [patent_app_date] => 2020-12-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7088 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 140 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17121480 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/121480
Switch control clamping Dec 13, 2020 Issued
Array ( [id] => 19874205 [patent_doc_number] => 12267081 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-04-01 [patent_title] => Apparatus for digital representation of angular difference [patent_app_type] => utility [patent_app_number] => 18/256059 [patent_app_country] => US [patent_app_date] => 2020-12-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 15 [patent_no_of_words] => 13895 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 191 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18256059 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/256059
Apparatus for digital representation of angular difference Dec 13, 2020 Issued
Menu