Derris Holt Banks

Array ( [id] => 7451768 [patent_doc_number] => 20040099937 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-05-27 [patent_title] => 'Semiconductor device, manufacturing method for semiconductor device and mounting method for the same' [patent_app_type] => new [patent_app_number] => 10/718549 [patent_app_country] => US [patent_app_date] => 2003-11-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 4248 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 51 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0099/20040099937.pdf [firstpage_image] =>[orig_patent_app_number] => 10718549 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 386978 [patent_doc_number] => 07304347 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-12-04 [patent_title] => 'Method for fabricating a power semiconductor device having a voltage sustaining layer with a terraced trench facilitating formation of floating islands' [patent_app_type] => utility [patent_app_number] => 10/712810 [patent_app_country] => US [patent_app_date] => 2003-11-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 11 [patent_no_of_words] => 3479 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/304/07304347.pdf [firstpage_image] =>[orig_patent_app_number] => 10712810 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7357904 [patent_doc_number] => 20040090758 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-05-13 [patent_title] => 'Multi-layered semiconductor device and method of manufacturing same' [patent_app_type] => new [patent_app_number] => 10/701612 [patent_app_country] => US [patent_app_date] => 2003-11-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 6229 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0090/20040090758.pdf [firstpage_image] =>[orig_patent_app_number] => 10701612 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7383343 [patent_doc_number] => 20040082149 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-04-29 [patent_title] => 'Thin-film semiconductor device and method of manufacturing the same' [patent_app_type] => new [patent_app_number] => 10/687743 [patent_app_country] => US [patent_app_date] => 2003-10-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5283 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 61 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0082/20040082149.pdf [firstpage_image] =>[orig_patent_app_number] => 10687743 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1031411 [patent_doc_number] => 06878965 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-04-12 [patent_title] => 'Test structure for determining a region of a deep trench outdiffusion in a memory cell array' [patent_app_type] => utility [patent_app_number] => 10/675493 [patent_app_country] => US [patent_app_date] => 2003-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 2955 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 180 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/878/06878965.pdf [firstpage_image] =>[orig_patent_app_number] => 10675493 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 975946 [patent_doc_number] => 06933563 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-08-23 [patent_title] => 'High performance, integrated, MOS-type semiconductor device and related manufacturing process' [patent_app_type] => utility [patent_app_number] => 10/677108 [patent_app_country] => US [patent_app_date] => 2003-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 3036 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 169 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/933/06933563.pdf [firstpage_image] =>[orig_patent_app_number] => 10677108 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 698897 [patent_doc_number] => 07067376 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-06-27 [patent_title] => 'High voltage power MOSFET having low on-resistance' [patent_app_type] => utility [patent_app_number] => 10/673889 [patent_app_country] => US [patent_app_date] => 2003-09-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3454 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 167 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/067/07067376.pdf [firstpage_image] =>[orig_patent_app_number] => 10673889 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 975952 [patent_doc_number] => 06933569 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-08-23 [patent_title] => 'SOI MOSFET' [patent_app_type] => utility [patent_app_number] => 10/668349 [patent_app_country] => US [patent_app_date] => 2003-09-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 32 [patent_figures_cnt] => 60 [patent_no_of_words] => 12685 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 177 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/933/06933569.pdf [firstpage_image] =>[orig_patent_app_number] => 10668349 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7267797 [patent_doc_number] => 20040056315 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-03-25 [patent_title] => 'Semiconductor device and manufacturing method thereof' [patent_app_type] => new [patent_app_number] => 10/668968 [patent_app_country] => US [patent_app_date] => 2003-09-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 11160 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 104 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0056/20040056315.pdf [firstpage_image] =>[orig_patent_app_number] => 10668968 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7372090 [patent_doc_number] => 20040080051 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-04-29 [patent_title] => ' Semiconductor device' [patent_app_type] => new [patent_app_number] => 10/667519 [patent_app_country] => US [patent_app_date] => 2003-09-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 22 [patent_no_of_words] => 10242 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0080/20040080051.pdf [firstpage_image] =>[orig_patent_app_number] => 10667519 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7459606 [patent_doc_number] => 20040094840 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-05-20 [patent_title] => 'Integrated circuit structure' [patent_app_type] => new [patent_app_number] => 10/472462 [patent_app_country] => US [patent_app_date] => 2003-09-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 1758 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 27 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0094/20040094840.pdf [firstpage_image] =>[orig_patent_app_number] => 10472462 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7010913 [patent_doc_number] => 20050064629 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-03-24 [patent_title] => 'Tungsten-copper interconnect and method for fabricating the same' [patent_app_type] => utility [patent_app_number] => 10/665309 [patent_app_country] => US [patent_app_date] => 2003-09-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 1888 [patent_no_of_claims] => 41 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0064/20050064629.pdf [firstpage_image] =>[orig_patent_app_number] => 10665309 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7420869 [patent_doc_number] => 20040183124 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-09-23 [patent_title] => 'Flash memory device with selective gate within a substrate and method of fabricating the same' [patent_app_type] => new [patent_app_number] => 10/666118 [patent_app_country] => US [patent_app_date] => 2003-09-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 3149 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0183/20040183124.pdf [firstpage_image] =>[orig_patent_app_number] => 10666118 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7450257 [patent_doc_number] => 20040067628 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-04-08 [patent_title] => 'Semiconductor device including an insulated gate field effect transistor and method of manufacting the same' [patent_app_type] => new [patent_app_number] => 10/665639 [patent_app_country] => US [patent_app_date] => 2003-09-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 8424 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0067/20040067628.pdf [firstpage_image] =>[orig_patent_app_number] => 10665639 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7268696 [patent_doc_number] => 20040057214 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-03-25 [patent_title] => 'Thermally enhanced lid for multichip modules' [patent_app_type] => new [patent_app_number] => 10/665669 [patent_app_country] => US [patent_app_date] => 2003-09-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 4411 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0057/20040057214.pdf [firstpage_image] =>[orig_patent_app_number] => 10665669 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7323388 [patent_doc_number] => 20040251493 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-12-16 [patent_title] => 'Lateral short-channel dmos, method for manufacturing same and semiconductor device' [patent_app_type] => new [patent_app_number] => 10/490509 [patent_app_country] => US [patent_app_date] => 2004-03-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 21 [patent_no_of_words] => 17440 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 190 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0251/20040251493.pdf [firstpage_image] =>[orig_patent_app_number] => 10490509 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 935420 [patent_doc_number] => 06974769 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-12-13 [patent_title] => 'Conductive structure fabrication process using novel layered structure and conductive structure fabricated thereby for use in multi-level metallization' [patent_app_type] => utility [patent_app_number] => 10/663318 [patent_app_country] => US [patent_app_date] => 2003-09-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 16 [patent_no_of_words] => 4034 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/974/06974769.pdf [firstpage_image] =>[orig_patent_app_number] => 10663318 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 496822 [patent_doc_number] => 07208369 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-04-24 [patent_title] => 'Dual poly layer and method of manufacture' [patent_app_type] => utility [patent_app_number] => 10/662609 [patent_app_country] => US [patent_app_date] => 2003-09-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 16 [patent_no_of_words] => 3942 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/208/07208369.pdf [firstpage_image] =>[orig_patent_app_number] => 10662609 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7446025 [patent_doc_number] => 20040051178 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-03-18 [patent_title] => 'Semiconductor recessed mask interconnect technology' [patent_app_type] => new [patent_app_number] => 10/661328 [patent_app_country] => US [patent_app_date] => 2003-09-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2879 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0051/20040051178.pdf [firstpage_image] =>[orig_patent_app_number] => 10661328 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7198179 [patent_doc_number] => 20050051789 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-03-10 [patent_title] => 'Solid metal block mounting substrates for semiconductor light emitting devices, and oxidizing methods for fabricating same' [patent_app_type] => utility [patent_app_number] => 10/659108 [patent_app_country] => US [patent_app_date] => 2003-09-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3713 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0051/20050051789.pdf [firstpage_image] =>[orig_patent_app_number] => 10659108 [rel_patent_id] =>[rel_patent_doc_number] =>)