Search

Deven M. Collins

Examiner (ID: 7081)

Most Active Art Unit
2823
Art Unit(s)
2822, 2823, 2812
Total Applications
382
Issued Applications
374
Pending Applications
5
Abandoned Applications
3

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 4004546 [patent_doc_number] => 05960308 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-09-28 [patent_title] => 'Process for making a chip sized semiconductor device' [patent_app_type] => 1 [patent_app_number] => 9/040370 [patent_app_country] => US [patent_app_date] => 1998-03-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 34 [patent_no_of_words] => 6510 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 172 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/960/05960308.pdf [firstpage_image] =>[orig_patent_app_number] => 040370 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/040370
Process for making a chip sized semiconductor device Mar 17, 1998 Issued
Array ( [id] => 3956869 [patent_doc_number] => 05930599 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-07-27 [patent_title] => 'Semiconductor device and method of manufacturing the same' [patent_app_type] => 1 [patent_app_number] => 9/040304 [patent_app_country] => US [patent_app_date] => 1998-03-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 22 [patent_no_of_words] => 7800 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 165 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/930/05930599.pdf [firstpage_image] =>[orig_patent_app_number] => 040304 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/040304
Semiconductor device and method of manufacturing the same Mar 17, 1998 Issued
Array ( [id] => 4189158 [patent_doc_number] => 06150679 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-11-21 [patent_title] => 'FIFO architecture with built-in intelligence for use in a graphics memory system for reducing paging overhead' [patent_app_type] => 1 [patent_app_number] => 9/042384 [patent_app_country] => US [patent_app_date] => 1998-03-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 13 [patent_no_of_words] => 9681 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 292 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/150/06150679.pdf [firstpage_image] =>[orig_patent_app_number] => 042384 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/042384
FIFO architecture with built-in intelligence for use in a graphics memory system for reducing paging overhead Mar 12, 1998 Issued
Array ( [id] => 3956700 [patent_doc_number] => 05930588 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-07-27 [patent_title] => 'Method for testing an integrated circuit device' [patent_app_type] => 1 [patent_app_number] => 9/041372 [patent_app_country] => US [patent_app_date] => 1998-03-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 15 [patent_no_of_words] => 4388 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/930/05930588.pdf [firstpage_image] =>[orig_patent_app_number] => 041372 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/041372
Method for testing an integrated circuit device Mar 10, 1998 Issued
Array ( [id] => 4097593 [patent_doc_number] => 06048752 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-04-11 [patent_title] => 'Density improvement for planar hybrid wafer scale integration' [patent_app_type] => 1 [patent_app_number] => 9/037180 [patent_app_country] => US [patent_app_date] => 1998-03-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 10 [patent_no_of_words] => 3863 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 46 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/048/06048752.pdf [firstpage_image] =>[orig_patent_app_number] => 037180 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/037180
Density improvement for planar hybrid wafer scale integration Mar 8, 1998 Issued
Array ( [id] => 4030777 [patent_doc_number] => 05963794 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-10-05 [patent_title] => 'Angularly offset stacked die multichip device and method of manufacture' [patent_app_type] => 1 [patent_app_number] => 9/030574 [patent_app_country] => US [patent_app_date] => 1998-02-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2388 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 51 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/963/05963794.pdf [firstpage_image] =>[orig_patent_app_number] => 030574 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/030574
Angularly offset stacked die multichip device and method of manufacture Feb 23, 1998 Issued
Array ( [id] => 3968643 [patent_doc_number] => 05904507 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-05-18 [patent_title] => 'Programmable anti-fuses using laser writing' [patent_app_type] => 1 [patent_app_number] => 9/028190 [patent_app_country] => US [patent_app_date] => 1998-02-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 3028 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/904/05904507.pdf [firstpage_image] =>[orig_patent_app_number] => 028190 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/028190
Programmable anti-fuses using laser writing Feb 22, 1998 Issued
Array ( [id] => 4030805 [patent_doc_number] => 05963796 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-10-05 [patent_title] => 'Fabrication method for semiconductor package substrate and semiconductor package' [patent_app_type] => 1 [patent_app_number] => 9/027185 [patent_app_country] => US [patent_app_date] => 1998-02-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 22 [patent_no_of_words] => 2651 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 66 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/963/05963796.pdf [firstpage_image] =>[orig_patent_app_number] => 027185 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/027185
Fabrication method for semiconductor package substrate and semiconductor package Feb 19, 1998 Issued
Array ( [id] => 3968607 [patent_doc_number] => 05904504 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-05-18 [patent_title] => 'Die attach method and integrated circuit device' [patent_app_type] => 1 [patent_app_number] => 9/025911 [patent_app_country] => US [patent_app_date] => 1998-02-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 9 [patent_no_of_words] => 1675 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 66 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/904/05904504.pdf [firstpage_image] =>[orig_patent_app_number] => 025911 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/025911
Die attach method and integrated circuit device Feb 18, 1998 Issued
Array ( [id] => 4218675 [patent_doc_number] => 06040205 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-03-21 [patent_title] => 'Apparatus and method for controlling the depth of immersion of a semiconductor element in an exposed surface of a viscous fluid' [patent_app_type] => 1 [patent_app_number] => 9/020197 [patent_app_country] => US [patent_app_date] => 1998-02-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 53 [patent_no_of_words] => 7712 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/040/06040205.pdf [firstpage_image] =>[orig_patent_app_number] => 020197 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/020197
Apparatus and method for controlling the depth of immersion of a semiconductor element in an exposed surface of a viscous fluid Feb 5, 1998 Issued
Array ( [id] => 3969419 [patent_doc_number] => 05904555 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-05-18 [patent_title] => 'Method for packaging a semiconductor device' [patent_app_type] => 1 [patent_app_number] => 9/016985 [patent_app_country] => US [patent_app_date] => 1998-02-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 9 [patent_no_of_words] => 3322 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 64 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/904/05904555.pdf [firstpage_image] =>[orig_patent_app_number] => 016985 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/016985
Method for packaging a semiconductor device Feb 1, 1998 Issued
Array ( [id] => 4130781 [patent_doc_number] => 06121067 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-09-19 [patent_title] => 'Method for additive de-marking of packaged integrated circuits and resulting packages' [patent_app_type] => 1 [patent_app_number] => 9/017260 [patent_app_country] => US [patent_app_date] => 1998-02-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 13 [patent_no_of_words] => 3715 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 40 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/121/06121067.pdf [firstpage_image] =>[orig_patent_app_number] => 017260 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/017260
Method for additive de-marking of packaged integrated circuits and resulting packages Feb 1, 1998 Issued
Array ( [id] => 3896092 [patent_doc_number] => 05897327 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-04-27 [patent_title] => 'Method of evaluating a semiconductor wafer' [patent_app_type] => 1 [patent_app_number] => 9/014084 [patent_app_country] => US [patent_app_date] => 1998-01-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 8 [patent_no_of_words] => 2104 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 57 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/897/05897327.pdf [firstpage_image] =>[orig_patent_app_number] => 014084 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/014084
Method of evaluating a semiconductor wafer Jan 26, 1998 Issued
Array ( [id] => 4107096 [patent_doc_number] => 06057173 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-05-02 [patent_title] => 'Ablative bond pad formation' [patent_app_type] => 1 [patent_app_number] => 9/014078 [patent_app_country] => US [patent_app_date] => 1998-01-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 2 [patent_no_of_words] => 1192 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 59 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/057/06057173.pdf [firstpage_image] =>[orig_patent_app_number] => 014078 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/014078
Ablative bond pad formation Jan 26, 1998 Issued
Array ( [id] => 3994409 [patent_doc_number] => 05918139 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-06-29 [patent_title] => 'Method of manufacturing a bonding substrate' [patent_app_type] => 1 [patent_app_number] => 9/014415 [patent_app_country] => US [patent_app_date] => 1998-01-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 10 [patent_no_of_words] => 4710 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 138 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/918/05918139.pdf [firstpage_image] =>[orig_patent_app_number] => 014415 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/014415
Method of manufacturing a bonding substrate Jan 26, 1998 Issued
Array ( [id] => 4071019 [patent_doc_number] => 05970382 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-10-19 [patent_title] => 'Process for forming coatings on semiconductor devices' [patent_app_type] => 1 [patent_app_number] => 9/013247 [patent_app_country] => US [patent_app_date] => 1998-01-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 4956 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/970/05970382.pdf [firstpage_image] =>[orig_patent_app_number] => 013247 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/013247
Process for forming coatings on semiconductor devices Jan 25, 1998 Issued
Array ( [id] => 4086541 [patent_doc_number] => 06133070 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-10-17 [patent_title] => 'Circuit member for semiconductor device, semiconductor device using the same, and method for manufacturing them' [patent_app_type] => 1 [patent_app_number] => 9/000107 [patent_app_country] => US [patent_app_date] => 1998-01-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 44 [patent_figures_cnt] => 83 [patent_no_of_words] => 38219 [patent_no_of_claims] => 77 [patent_no_of_ind_claims] => 23 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/133/06133070.pdf [firstpage_image] =>[orig_patent_app_number] => 000107 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/000107
Circuit member for semiconductor device, semiconductor device using the same, and method for manufacturing them Jan 25, 1998 Issued
Array ( [id] => 4151662 [patent_doc_number] => 06124145 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-09-26 [patent_title] => 'Micromachined gas-filled chambers and method of microfabrication' [patent_app_type] => 1 [patent_app_number] => 9/012660 [patent_app_country] => US [patent_app_date] => 1998-01-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 57 [patent_no_of_words] => 6984 [patent_no_of_claims] => 46 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 239 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/124/06124145.pdf [firstpage_image] =>[orig_patent_app_number] => 012660 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/012660
Micromachined gas-filled chambers and method of microfabrication Jan 22, 1998 Issued
09/005775 CONNECTION LEADS FOR AN ELECTRONIC COMPONENT Jan 11, 1998 Issued
Array ( [id] => 4070088 [patent_doc_number] => 05970322 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-10-19 [patent_title] => 'Ultrahigh-frequency electronic component and method of manufacturing the same' [patent_app_type] => 1 [patent_app_number] => 9/004447 [patent_app_country] => US [patent_app_date] => 1998-01-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 8 [patent_no_of_words] => 3488 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 193 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/970/05970322.pdf [firstpage_image] =>[orig_patent_app_number] => 004447 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/004447
Ultrahigh-frequency electronic component and method of manufacturing the same Jan 7, 1998 Issued
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