
Deven M. Collins
Examiner (ID: 7081)
| Most Active Art Unit | 2823 |
| Art Unit(s) | 2822, 2823, 2812 |
| Total Applications | 382 |
| Issued Applications | 374 |
| Pending Applications | 5 |
| Abandoned Applications | 3 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 4289144
[patent_doc_number] => 06235551
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-05-22
[patent_title] => 'Semiconductor device including edge bond pads and methods'
[patent_app_type] => 1
[patent_app_number] => 9/001404
[patent_app_country] => US
[patent_app_date] => 1997-12-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 12
[patent_no_of_words] => 3174
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 51
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/235/06235551.pdf
[firstpage_image] =>[orig_patent_app_number] => 001404
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/001404 | Semiconductor device including edge bond pads and methods | Dec 30, 1997 | Issued |
Array
(
[id] => 4129797
[patent_doc_number] => 06033937
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-03-07
[patent_title] => 'S.sub.i O.sub.2 wire bond insulation in semiconductor assemblies'
[patent_app_type] => 1
[patent_app_number] => 8/996836
[patent_app_country] => US
[patent_app_date] => 1997-12-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 13
[patent_no_of_words] => 2381
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 108
[patent_maintenance] => 1
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/033/06033937.pdf
[firstpage_image] =>[orig_patent_app_number] => 996836
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/996836 | S.sub.i O.sub.2 wire bond insulation in semiconductor assemblies | Dec 22, 1997 | Issued |
Array
(
[id] => 4113753
[patent_doc_number] => 06046075
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-04-04
[patent_title] => 'Oxide wire bond insulation in semiconductor assemblies'
[patent_app_type] => 1
[patent_app_number] => 8/997295
[patent_app_country] => US
[patent_app_date] => 1997-12-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
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[patent_no_of_words] => 2331
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[pdf_file] => patents/06/046/06046075.pdf
[firstpage_image] =>[orig_patent_app_number] => 997295
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/997295 | Oxide wire bond insulation in semiconductor assemblies | Dec 22, 1997 | Issued |
Array
(
[id] => 4214982
[patent_doc_number] => 06087203
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-07-11
[patent_title] => 'Method for adhering and sealing a silicon chip in an integrated circuit package'
[patent_app_type] => 1
[patent_app_number] => 8/994240
[patent_app_country] => US
[patent_app_date] => 1997-12-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 1
[patent_figures_cnt] => 3
[patent_no_of_words] => 4669
[patent_no_of_claims] => 8
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/087/06087203.pdf
[firstpage_image] =>[orig_patent_app_number] => 994240
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/994240 | Method for adhering and sealing a silicon chip in an integrated circuit package | Dec 18, 1997 | Issued |
Array
(
[id] => 4058058
[patent_doc_number] => 05909634
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-06-01
[patent_title] => 'Method and apparatus for forming solder on a substrate'
[patent_app_type] => 1
[patent_app_number] => 8/993636
[patent_app_country] => US
[patent_app_date] => 1997-12-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
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[pdf_file] => patents/05/909/05909634.pdf
[firstpage_image] =>[orig_patent_app_number] => 993636
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/993636 | Method and apparatus for forming solder on a substrate | Dec 17, 1997 | Issued |
Array
(
[id] => 4101980
[patent_doc_number] => 06100166
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-08-08
[patent_title] => 'Process for producing semiconductor article'
[patent_app_type] => 1
[patent_app_number] => 8/993034
[patent_app_country] => US
[patent_app_date] => 1997-12-18
[patent_effective_date] => 0000-00-00
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[pdf_file] => patents/06/100/06100166.pdf
[firstpage_image] =>[orig_patent_app_number] => 993034
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/993034 | Process for producing semiconductor article | Dec 17, 1997 | Issued |
Array
(
[id] => 3885819
[patent_doc_number] => 05893726
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-04-13
[patent_title] => 'Semiconductor package with pre-fabricated cover and method of fabrication'
[patent_app_type] => 1
[patent_app_number] => 8/990866
[patent_app_country] => US
[patent_app_date] => 1997-12-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
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[pdf_file] => patents/05/893/05893726.pdf
[firstpage_image] =>[orig_patent_app_number] => 990866
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/990866 | Semiconductor package with pre-fabricated cover and method of fabrication | Dec 14, 1997 | Issued |
Array
(
[id] => 3952559
[patent_doc_number] => 05940681
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-08-17
[patent_title] => 'Method and apparatus for automatically checking position data of J-leads'
[patent_app_type] => 1
[patent_app_number] => 8/989274
[patent_app_country] => US
[patent_app_date] => 1997-12-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 6
[patent_no_of_words] => 3572
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[pdf_file] => patents/05/940/05940681.pdf
[firstpage_image] =>[orig_patent_app_number] => 989274
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/989274 | Method and apparatus for automatically checking position data of J-leads | Dec 11, 1997 | Issued |
Array
(
[id] => 4009101
[patent_doc_number] => 05920765
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-07-06
[patent_title] => 'IC wafer-probe testable flip-chip architecture'
[patent_app_type] => 1
[patent_app_number] => 8/991218
[patent_app_country] => US
[patent_app_date] => 1997-12-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
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[pdf_file] => patents/05/920/05920765.pdf
[firstpage_image] =>[orig_patent_app_number] => 991218
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/991218 | IC wafer-probe testable flip-chip architecture | Dec 11, 1997 | Issued |
Array
(
[id] => 1490080
[patent_doc_number] => 06417029
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2002-07-09
[patent_title] => 'Compliant package with conductive elastomeric posts'
[patent_app_type] => B1
[patent_app_number] => 08/989306
[patent_app_country] => US
[patent_app_date] => 1997-12-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
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[patent_no_of_words] => 3778
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[pdf_file] => patents/06/417/06417029.pdf
[firstpage_image] =>[orig_patent_app_number] => 08989306
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/989306 | Compliant package with conductive elastomeric posts | Dec 11, 1997 | Issued |
Array
(
[id] => 3941301
[patent_doc_number] => 05989941
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-11-23
[patent_title] => 'Encapsulated integrated circuit packaging'
[patent_app_type] => 1
[patent_app_number] => 8/989754
[patent_app_country] => US
[patent_app_date] => 1997-12-12
[patent_effective_date] => 0000-00-00
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[pdf_file] => patents/05/989/05989941.pdf
[firstpage_image] =>[orig_patent_app_number] => 989754
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/989754 | Encapsulated integrated circuit packaging | Dec 11, 1997 | Issued |
Array
(
[id] => 4009161
[patent_doc_number] => 05920769
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-07-06
[patent_title] => 'Method and apparatus for processing a planar structure'
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[patent_app_number] => 8/990072
[patent_app_country] => US
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[pdf_file] => patents/05/920/05920769.pdf
[firstpage_image] =>[orig_patent_app_number] => 990072
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Array
(
[id] => 4080575
[patent_doc_number] => 06054337
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-04-25
[patent_title] => 'Method of making a compliant multichip package'
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Array
(
[id] => 3942450
[patent_doc_number] => 05946590
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[patent_issue_date] => 1999-08-31
[patent_title] => 'Method for making bumps'
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Array
(
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[patent_issue_date] => 1999-07-27
[patent_title] => 'Wide frequency band transition between via RF transmission lines and planar transmission lines'
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Array
(
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[firstpage_image] =>[orig_patent_app_number] => 979694
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/979694 | Method of manufacturing an electronic component | Nov 25, 1997 | Issued |
Array
(
[id] => 4070107
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[patent_issue_date] => 1999-08-03
[patent_title] => 'Method and apparatus for forming solder bumps for a semiconductor device'
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[firstpage_image] =>[orig_patent_app_number] => 979784
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/979784 | Method and apparatus for forming solder bumps for a semiconductor device | Nov 25, 1997 | Issued |
Array
(
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Array
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Array
(
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[pdf_file] => patents/06/046/06046076.pdf
[firstpage_image] =>[orig_patent_app_number] => 975590
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/975590 | Vacuum dispense method for dispensing an encapsulant and machine therefor | Nov 19, 1997 | Issued |