Deven M. Collins

Array ( [id] => 4094127 [patent_doc_number] => 06096575 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-08-01 [patent_title] => 'Optimum condition detection method for flip-chip' [patent_app_type] => 1 [patent_app_number] => 9/384934 [patent_app_country] => US [patent_app_date] => 1999-08-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 3652 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 191 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/096/06096575.pdf [firstpage_image] =>[orig_patent_app_number] => 384934 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4416894 [patent_doc_number] => 06194246 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-02-27 [patent_title] => 'Process for fabricating electronic devices having a thermally conductive substrate' [patent_app_type] => 1 [patent_app_number] => 9/382943 [patent_app_country] => US [patent_app_date] => 1999-08-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 9 [patent_no_of_words] => 3927 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 49 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/194/06194246.pdf [firstpage_image] =>[orig_patent_app_number] => 382943 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4246532 [patent_doc_number] => 06221692 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-04-24 [patent_title] => 'Method of fabricating solder-bearing silicon semiconductor device and circuit board mounted therewith' [patent_app_type] => 1 [patent_app_number] => 9/382673 [patent_app_country] => US [patent_app_date] => 1999-08-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 10 [patent_no_of_words] => 5638 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 182 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/221/06221692.pdf [firstpage_image] =>[orig_patent_app_number] => 382673 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4302262 [patent_doc_number] => 06187614 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-02-13 [patent_title] => 'Electronic component, method for making the same, and lead frame and mold assembly for use therein' [patent_app_type] => 1 [patent_app_number] => 9/379623 [patent_app_country] => US [patent_app_date] => 1999-08-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 24 [patent_no_of_words] => 7406 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 310 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/187/06187614.pdf [firstpage_image] =>[orig_patent_app_number] => 379623 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4250428 [patent_doc_number] => 06207551 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-03-27 [patent_title] => 'Method and apparatus using formic acid vapor as reducing agent for copper wirebonding' [patent_app_type] => 1 [patent_app_number] => 9/382003 [patent_app_country] => US [patent_app_date] => 1999-08-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2742 [patent_no_of_claims] => 31 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/207/06207551.pdf [firstpage_image] =>[orig_patent_app_number] => 382003 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4358815 [patent_doc_number] => 06255209 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-07-03 [patent_title] => 'Methods of forming a contact having titanium formed by chemical vapor deposition' [patent_app_type] => 1 [patent_app_number] => 9/376023 [patent_app_country] => US [patent_app_date] => 1999-08-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 10 [patent_no_of_words] => 3356 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 51 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/255/06255209.pdf [firstpage_image] =>[orig_patent_app_number] => 376023 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4406191 [patent_doc_number] => 06171943 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-01-09 [patent_title] => 'Methods of forming a contact having titanium silicide formed by chemical vapor deposition' [patent_app_type] => 1 [patent_app_number] => 9/377273 [patent_app_country] => US [patent_app_date] => 1999-08-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 10 [patent_no_of_words] => 3362 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/171/06171943.pdf [firstpage_image] =>[orig_patent_app_number] => 377273 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4257909 [patent_doc_number] => 06208033 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-03-27 [patent_title] => 'Apparatus having titanium silicide and titanium formed by chemical vapor deposition' [patent_app_type] => 1 [patent_app_number] => 9/377253 [patent_app_country] => US [patent_app_date] => 1999-08-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 10 [patent_no_of_words] => 3358 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 146 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/208/06208033.pdf [firstpage_image] =>[orig_patent_app_number] => 377253 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4214952 [patent_doc_number] => 06110817 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-08-29 [patent_title] => 'Method for improvement of electromigration of copper by carbon doping' [patent_app_type] => 1 [patent_app_number] => 9/377544 [patent_app_country] => US [patent_app_date] => 1999-08-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 2333 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/110/06110817.pdf [firstpage_image] =>[orig_patent_app_number] => 377544 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4294462 [patent_doc_number] => 06211575 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-04-03 [patent_title] => 'Method and apparatus for identifying customized integrated circuits' [patent_app_type] => 1 [patent_app_number] => 9/376503 [patent_app_country] => US [patent_app_date] => 1999-08-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3212 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/211/06211575.pdf [firstpage_image] =>[orig_patent_app_number] => 376503 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4319004 [patent_doc_number] => 06248656 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-06-19 [patent_title] => 'Metal-jacketed lead manufacturing process using resist layers' [patent_app_type] => 1 [patent_app_number] => 9/374394 [patent_app_country] => US [patent_app_date] => 1999-08-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 27 [patent_no_of_words] => 4659 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 148 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/248/06248656.pdf [firstpage_image] =>[orig_patent_app_number] => 374394 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4191577 [patent_doc_number] => 06130150 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-10-10 [patent_title] => 'Method of making a semiconductor device with barrier and conductor protection' [patent_app_type] => 1 [patent_app_number] => 9/370523 [patent_app_country] => US [patent_app_date] => 1999-08-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 1916 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/130/06130150.pdf [firstpage_image] =>[orig_patent_app_number] => 370523 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4131544 [patent_doc_number] => 06121118 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-09-19 [patent_title] => 'Chip separation device and method' [patent_app_type] => 1 [patent_app_number] => 9/369683 [patent_app_country] => US [patent_app_date] => 1999-08-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 14 [patent_no_of_words] => 2457 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/121/06121118.pdf [firstpage_image] =>[orig_patent_app_number] => 369683 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4404985 [patent_doc_number] => 06232147 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-05-15 [patent_title] => 'Method for manufacturing semiconductor device with pad structure' [patent_app_type] => 1 [patent_app_number] => 9/365413 [patent_app_country] => US [patent_app_date] => 1999-08-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 28 [patent_no_of_words] => 9192 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 194 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/232/06232147.pdf [firstpage_image] =>[orig_patent_app_number] => 365413 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4196645 [patent_doc_number] => 06130479 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-10-10 [patent_title] => 'Nickel alloy films for reduced intermetallic formation in solder' [patent_app_type] => 1 [patent_app_number] => 9/365683 [patent_app_country] => US [patent_app_date] => 1999-08-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 6 [patent_no_of_words] => 2200 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/130/06130479.pdf [firstpage_image] =>[orig_patent_app_number] => 365683 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4097543 [patent_doc_number] => 06048749 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-04-11 [patent_title] => 'Fabrication process of a semiconductor device including grinding of a semiconductor wafer' [patent_app_type] => 1 [patent_app_number] => 9/362703 [patent_app_country] => US [patent_app_date] => 1999-07-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 11 [patent_no_of_words] => 4500 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/048/06048749.pdf [firstpage_image] =>[orig_patent_app_number] => 362703 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4419878 [patent_doc_number] => 06225146 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-05-01 [patent_title] => 'Lead frame, method of manufacturing lead frame, semiconductor device and method of manufacturing semiconductor device' [patent_app_type] => 1 [patent_app_number] => 9/361404 [patent_app_country] => US [patent_app_date] => 1999-07-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 29 [patent_figures_cnt] => 34 [patent_no_of_words] => 13667 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 169 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/225/06225146.pdf [firstpage_image] =>[orig_patent_app_number] => 361404 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4302881 [patent_doc_number] => 06251798 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-06-26 [patent_title] => 'Formation of air gap structures for inter-metal dielectric application' [patent_app_type] => 1 [patent_app_number] => 9/359894 [patent_app_country] => US [patent_app_date] => 1999-07-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 2020 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 140 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/251/06251798.pdf [firstpage_image] =>[orig_patent_app_number] => 359894 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4407976 [patent_doc_number] => 06265246 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-07-24 [patent_title] => 'Microcap wafer-level package' [patent_app_type] => 1 [patent_app_number] => 9/359844 [patent_app_country] => US [patent_app_date] => 1999-07-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 12 [patent_no_of_words] => 3821 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 162 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/265/06265246.pdf [firstpage_image] =>[orig_patent_app_number] => 359844 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4116352 [patent_doc_number] => 06071755 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-06-06 [patent_title] => 'Method of manufacturing semiconductor device' [patent_app_type] => 1 [patent_app_number] => 9/360484 [patent_app_country] => US [patent_app_date] => 1999-07-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 44 [patent_no_of_words] => 11024 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 65 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/071/06071755.pdf [firstpage_image] =>[orig_patent_app_number] => 360484 [rel_patent_id] =>[rel_patent_doc_number] =>)