
Devon C. Kramer
Supervisory Patent Examiner (ID: 1983, Phone: (571)272-7118 , Office: P/3746 )
| Most Active Art Unit | 3683 |
| Art Unit(s) | 3683, 3741, 3613, 3746 |
| Total Applications | 1035 |
| Issued Applications | 672 |
| Pending Applications | 81 |
| Abandoned Applications | 283 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 7278781
[patent_doc_number] => 20040061158
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-04-01
[patent_title] => 'Semiconductor device having different thickness gate oxides'
[patent_app_type] => new
[patent_app_number] => 10/369625
[patent_app_country] => US
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Array
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[patent_title] => 'Power switching transistor with low drain to gate capacitance'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/369236 | Power switching transistor with low drain to gate capacitance | Feb 19, 2003 | Abandoned |
Array
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[patent_issue_date] => 2005-12-27
[patent_title] => 'Devices with patterned wells and method for forming same'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/360374 | Devices with patterned wells and method for forming same | Feb 5, 2003 | Issued |
Array
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[patent_issue_date] => 2004-08-05
[patent_title] => 'Double-gate FinFET device and fabricating method thereof'
[patent_app_type] => new
[patent_app_number] => 10/358981
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Array
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[patent_title] => 'Gate metal recess for oxidation protection and parasitic capacitance reduction'
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Array
(
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Array
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Array
(
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[patent_title] => 'Double diffusion MOSFET with N+ and P+ type regions at an equal potential'
[patent_app_type] => utility
[patent_app_number] => 10/346806
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Array
(
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[patent_title] => 'LDMOS transistor with high voltage source and drain terminals'
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Array
(
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/329643 | High breakdown voltage CMOS device | Dec 25, 2002 | Issued |
Array
(
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/329851 | Large current capacity semiconductor device | Dec 25, 2002 | Issued |
Array
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Array
(
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Array
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Array
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Array
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Array
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