Search

Devon C. Kramer

Supervisory Patent Examiner (ID: 1983, Phone: (571)272-7118 , Office: P/3746 )

Most Active Art Unit
3683
Art Unit(s)
3683, 3741, 3613, 3746
Total Applications
1035
Issued Applications
672
Pending Applications
81
Abandoned Applications
283

Applications

Application numberTitle of the applicationFiling DateStatus
09/395832 TRENCH DMOS TRANSISTOR HAVING IMPROVED TRENCH STRUCTURE Sep 13, 1999 Abandoned
Array ( [id] => 1384599 [patent_doc_number] => 06559515 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-05-06 [patent_title] => 'Insulating wall between power components' [patent_app_type] => B1 [patent_app_number] => 09/391636 [patent_app_country] => US [patent_app_date] => 1999-09-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 8 [patent_no_of_words] => 3503 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/559/06559515.pdf [firstpage_image] =>[orig_patent_app_number] => 09391636 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/391636
Insulating wall between power components Sep 6, 1999 Issued
Array ( [id] => 1328118 [patent_doc_number] => 06603173 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-08-05 [patent_title] => 'Vertical type MOSFET' [patent_app_type] => B1 [patent_app_number] => 09/391236 [patent_app_country] => US [patent_app_date] => 1999-09-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 46 [patent_no_of_words] => 15774 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/603/06603173.pdf [firstpage_image] =>[orig_patent_app_number] => 09391236 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/391236
Vertical type MOSFET Sep 6, 1999 Issued
Array ( [id] => 4355087 [patent_doc_number] => 06215143 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-04-10 [patent_title] => 'DRAM cell capacitor having hemispherical grain silicon on a selected portion of a storage node' [patent_app_type] => 1 [patent_app_number] => 9/377156 [patent_app_country] => US [patent_app_date] => 1999-08-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 3580 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 132 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/215/06215143.pdf [firstpage_image] =>[orig_patent_app_number] => 377156 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/377156
DRAM cell capacitor having hemispherical grain silicon on a selected portion of a storage node Aug 18, 1999 Issued
Array ( [id] => 1476293 [patent_doc_number] => 06388286 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-05-14 [patent_title] => 'Power semiconductor devices having trench-based gate electrodes and field plates' [patent_app_type] => B1 [patent_app_number] => 09/377006 [patent_app_country] => US [patent_app_date] => 1999-08-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 17 [patent_no_of_words] => 8074 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 270 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/388/06388286.pdf [firstpage_image] =>[orig_patent_app_number] => 09377006 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/377006
Power semiconductor devices having trench-based gate electrodes and field plates Aug 17, 1999 Issued
Array ( [id] => 1352063 [patent_doc_number] => 06580142 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-06-17 [patent_title] => 'Electrical control methods involving semiconductor components' [patent_app_type] => B1 [patent_app_number] => 09/373464 [patent_app_country] => US [patent_app_date] => 1999-08-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 27 [patent_no_of_words] => 6979 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 42 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/580/06580142.pdf [firstpage_image] =>[orig_patent_app_number] => 09373464 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/373464
Electrical control methods involving semiconductor components Aug 11, 1999 Issued
Array ( [id] => 7026605 [patent_doc_number] => 20010013610 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-08-16 [patent_title] => 'VERTICAL BIPOLAR TRANSISTOR BASED ON GATE INDUCED DRAIN LEAKAGE CURRENT' [patent_app_type] => new [patent_app_number] => 09/365436 [patent_app_country] => US [patent_app_date] => 1999-08-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2076 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0013/20010013610.pdf [firstpage_image] =>[orig_patent_app_number] => 09365436 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/365436
VERTICAL BIPOLAR TRANSISTOR BASED ON GATE INDUCED DRAIN LEAKAGE CURRENT Aug 1, 1999 Abandoned
Array ( [id] => 4355479 [patent_doc_number] => 06215168 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-04-10 [patent_title] => 'Doubly graded junction termination extension for edge passivation of semiconductor devices' [patent_app_type] => 1 [patent_app_number] => 9/358625 [patent_app_country] => US [patent_app_date] => 1999-07-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 1724 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 146 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/215/06215168.pdf [firstpage_image] =>[orig_patent_app_number] => 358625 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/358625
Doubly graded junction termination extension for edge passivation of semiconductor devices Jul 20, 1999 Issued
Array ( [id] => 4373159 [patent_doc_number] => 06274905 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-08-14 [patent_title] => 'Trench structure substantially filled with high-conductivity material' [patent_app_type] => 1 [patent_app_number] => 9/343330 [patent_app_country] => US [patent_app_date] => 1999-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 11 [patent_no_of_words] => 3698 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 68 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/274/06274905.pdf [firstpage_image] =>[orig_patent_app_number] => 343330 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/343330
Trench structure substantially filled with high-conductivity material Jun 29, 1999 Issued
Array ( [id] => 4294057 [patent_doc_number] => 06211550 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-04-03 [patent_title] => 'Backmetal drain terminal with low stress and thermal resistance' [patent_app_type] => 1 [patent_app_number] => 9/339356 [patent_app_country] => US [patent_app_date] => 1999-06-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 3 [patent_no_of_words] => 2026 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 63 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/211/06211550.pdf [firstpage_image] =>[orig_patent_app_number] => 339356 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/339356
Backmetal drain terminal with low stress and thermal resistance Jun 23, 1999 Issued
Array ( [id] => 4277618 [patent_doc_number] => 06323509 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-11-27 [patent_title] => 'Power semiconductor device including a free wheeling diode and method of manufacturing for same' [patent_app_type] => 1 [patent_app_number] => 9/334598 [patent_app_country] => US [patent_app_date] => 1999-06-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 43 [patent_figures_cnt] => 43 [patent_no_of_words] => 18044 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 211 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/323/06323509.pdf [firstpage_image] =>[orig_patent_app_number] => 334598 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/334598
Power semiconductor device including a free wheeling diode and method of manufacturing for same Jun 16, 1999 Issued
Array ( [id] => 4364352 [patent_doc_number] => 06191447 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-02-20 [patent_title] => 'Power semiconductor devices that utilize tapered trench-based insulating regions to improve electric field profiles in highly doped drift region mesas and methods of forming same' [patent_app_type] => 1 [patent_app_number] => 9/322424 [patent_app_country] => US [patent_app_date] => 1999-05-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 21 [patent_no_of_words] => 10267 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 216 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/191/06191447.pdf [firstpage_image] =>[orig_patent_app_number] => 322424 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/322424
Power semiconductor devices that utilize tapered trench-based insulating regions to improve electric field profiles in highly doped drift region mesas and methods of forming same May 27, 1999 Issued
Array ( [id] => 6137683 [patent_doc_number] => 20020000564 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-01-03 [patent_title] => 'LOW TURN-ON VOLTAGE INP SCHOTTKY DEVICE AND METHOD' [patent_app_type] => new [patent_app_number] => 09/322260 [patent_app_country] => US [patent_app_date] => 1999-05-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2600 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 36 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0000/20020000564.pdf [firstpage_image] =>[orig_patent_app_number] => 09322260 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/322260
Low turn-on voltage InP Schottky device and method May 27, 1999 Issued
Array ( [id] => 1002689 [patent_doc_number] => 06909146 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2005-06-21 [patent_title] => 'Bonded wafer with metal silicidation' [patent_app_type] => utility [patent_app_number] => 09/316580 [patent_app_country] => US [patent_app_date] => 1999-05-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 21 [patent_no_of_words] => 4644 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/909/06909146.pdf [firstpage_image] =>[orig_patent_app_number] => 09316580 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/316580
Bonded wafer with metal silicidation May 20, 1999 Issued
Array ( [id] => 4373490 [patent_doc_number] => 06274926 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-08-14 [patent_title] => 'Plate-shaped external storage device and method of producing the same' [patent_app_type] => 1 [patent_app_number] => 9/315986 [patent_app_country] => US [patent_app_date] => 1999-05-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 4228 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 238 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/274/06274926.pdf [firstpage_image] =>[orig_patent_app_number] => 315986 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/315986
Plate-shaped external storage device and method of producing the same May 20, 1999 Issued
Array ( [id] => 1568432 [patent_doc_number] => 06376897 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2002-04-23 [patent_title] => 'Lateral bipolar transistor formed on an insulating layer' [patent_app_type] => B2 [patent_app_number] => 09/314114 [patent_app_country] => US [patent_app_date] => 1999-05-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 39 [patent_figures_cnt] => 116 [patent_no_of_words] => 16493 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 241 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/376/06376897.pdf [firstpage_image] =>[orig_patent_app_number] => 09314114 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/314114
Lateral bipolar transistor formed on an insulating layer May 18, 1999 Issued
Array ( [id] => 4309997 [patent_doc_number] => 06326668 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-12-04 [patent_title] => 'Semiconductor structure including metal nitride and metal silicide' [patent_app_type] => 1 [patent_app_number] => 9/285573 [patent_app_country] => US [patent_app_date] => 1999-04-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 5914 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/326/06326668.pdf [firstpage_image] =>[orig_patent_app_number] => 285573 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/285573
Semiconductor structure including metal nitride and metal silicide Apr 1, 1999 Issued
Array ( [id] => 7117932 [patent_doc_number] => 20010001494 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-05-24 [patent_title] => 'POWER TRENCH MOS-GATED DEVICE AND PROCESS FOR FORMING SAME' [patent_app_type] => new-utility [patent_app_number] => 09/283536 [patent_app_country] => US [patent_app_date] => 1999-04-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 2368 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0001/20010001494.pdf [firstpage_image] =>[orig_patent_app_number] => 09283536 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/283536
POWER TRENCH MOS-GATED DEVICE AND PROCESS FOR FORMING SAME Mar 31, 1999 Abandoned
Array ( [id] => 1217972 [patent_doc_number] => 06707103 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-03-16 [patent_title] => 'Low voltage rad hard MOSFET' [patent_app_type] => B1 [patent_app_number] => 09/263916 [patent_app_country] => US [patent_app_date] => 1999-03-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 12 [patent_no_of_words] => 1719 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 185 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/707/06707103.pdf [firstpage_image] =>[orig_patent_app_number] => 09263916 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/263916
Low voltage rad hard MOSFET Mar 4, 1999 Issued
Array ( [id] => 1587851 [patent_doc_number] => 06359318 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-03-19 [patent_title] => 'Semiconductor device with DMOS and bi-polar transistors' [patent_app_type] => B1 [patent_app_number] => 09/258401 [patent_app_country] => US [patent_app_date] => 1999-02-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 22 [patent_no_of_words] => 6856 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 342 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/359/06359318.pdf [firstpage_image] =>[orig_patent_app_number] => 09258401 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/258401
Semiconductor device with DMOS and bi-polar transistors Feb 25, 1999 Issued
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