
Devon C. Kramer
Supervisory Patent Examiner (ID: 1983, Phone: (571)272-7118 , Office: P/3746 )
| Most Active Art Unit | 3683 |
| Art Unit(s) | 3683, 3741, 3613, 3746 |
| Total Applications | 1035 |
| Issued Applications | 672 |
| Pending Applications | 81 |
| Abandoned Applications | 283 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 4423608
[patent_doc_number] => 06177704
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-01-23
[patent_title] => 'Semiconductor device containing a lateral MOS transistor'
[patent_app_type] => 1
[patent_app_number] => 9/160594
[patent_app_country] => US
[patent_app_date] => 1998-09-25
[patent_effective_date] => 0000-00-00
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[patent_no_of_words] => 7896
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[pdf_file] => patents/06/177/06177704.pdf
[firstpage_image] =>[orig_patent_app_number] => 160594
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/160594 | Semiconductor device containing a lateral MOS transistor | Sep 24, 1998 | Issued |
Array
(
[id] => 7076916
[patent_doc_number] => 20010040260
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2001-11-15
[patent_title] => 'HIGH-RESISTANCE LOAD SRAM'
[patent_app_type] => new
[patent_app_number] => 09/160796
[patent_app_country] => US
[patent_app_date] => 1998-09-25
[patent_effective_date] => 0000-00-00
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/160796 | HIGH-RESISTANCE LOAD SRAM | Sep 24, 1998 | Abandoned |
Array
(
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[patent_doc_number] => 06081013
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[patent_kind] => NA
[patent_issue_date] => 2000-06-27
[patent_title] => 'Semiconductor device having a reduced distance between the input resistor and the internal circuit'
[patent_app_type] => 1
[patent_app_number] => 9/159788
[patent_app_country] => US
[patent_app_date] => 1998-09-24
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[pdf_file] => patents/06/081/06081013.pdf
[firstpage_image] =>[orig_patent_app_number] => 159788
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/159788 | Semiconductor device having a reduced distance between the input resistor and the internal circuit | Sep 23, 1998 | Issued |
Array
(
[id] => 1486745
[patent_doc_number] => 06365943
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2002-04-02
[patent_title] => 'High density integrated circuit'
[patent_app_type] => B1
[patent_app_number] => 09/157644
[patent_app_country] => US
[patent_app_date] => 1998-09-21
[patent_effective_date] => 0000-00-00
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/157644 | High density integrated circuit | Sep 20, 1998 | Issued |
Array
(
[id] => 4294044
[patent_doc_number] => 06211549
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[patent_kind] => NA
[patent_issue_date] => 2001-04-03
[patent_title] => 'High breakdown voltage semiconductor device including first and second semiconductor elements'
[patent_app_type] => 1
[patent_app_number] => 9/153295
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[patent_app_date] => 1998-09-15
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[pdf_file] => patents/06/211/06211549.pdf
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/153295 | High breakdown voltage semiconductor device including first and second semiconductor elements | Sep 14, 1998 | Issued |
Array
(
[id] => 1522246
[patent_doc_number] => 06414352
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2002-07-02
[patent_title] => 'Semiconductor device having an electronically insulating layer including a nitride layer'
[patent_app_type] => B2
[patent_app_number] => 09/150936
[patent_app_country] => US
[patent_app_date] => 1998-09-10
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[pdf_file] => patents/06/414/06414352.pdf
[firstpage_image] =>[orig_patent_app_number] => 09150936
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/150936 | Semiconductor device having an electronically insulating layer including a nitride layer | Sep 9, 1998 | Issued |
Array
(
[id] => 4242588
[patent_doc_number] => 06144071
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[patent_issue_date] => 2000-11-07
[patent_title] => 'Ultrathin silicon nitride containing sidewall spacers for improved transistor performance'
[patent_app_type] => 1
[patent_app_number] => 9/146294
[patent_app_country] => US
[patent_app_date] => 1998-09-03
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[pdf_file] => patents/06/144/06144071.pdf
[firstpage_image] =>[orig_patent_app_number] => 146294
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/146294 | Ultrathin silicon nitride containing sidewall spacers for improved transistor performance | Sep 2, 1998 | Issued |
Array
(
[id] => 4366367
[patent_doc_number] => 06255709
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-07-03
[patent_title] => 'Color-selective SI detector array'
[patent_app_type] => 1
[patent_app_number] => 9/142295
[patent_app_country] => US
[patent_app_date] => 1998-09-03
[patent_effective_date] => 0000-00-00
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[pdf_file] => patents/06/255/06255709.pdf
[firstpage_image] =>[orig_patent_app_number] => 142295
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/142295 | Color-selective SI detector array | Sep 2, 1998 | Issued |
Array
(
[id] => 4242576
[patent_doc_number] => 06144070
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[patent_kind] => NA
[patent_issue_date] => 2000-11-07
[patent_title] => 'High breakdown-voltage transistor with electrostatic discharge protection'
[patent_app_type] => 1
[patent_app_number] => 9/141496
[patent_app_country] => US
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/141496 | High breakdown-voltage transistor with electrostatic discharge protection | Aug 27, 1998 | Issued |
Array
(
[id] => 4276782
[patent_doc_number] => 06246076
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[patent_kind] => NA
[patent_issue_date] => 2001-06-12
[patent_title] => 'Layered dielectric on silicon carbide semiconductor structures'
[patent_app_type] => 1
[patent_app_number] => 9/141795
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[pdf_file] => patents/06/246/06246076.pdf
[firstpage_image] =>[orig_patent_app_number] => 141795
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/141795 | Layered dielectric on silicon carbide semiconductor structures | Aug 27, 1998 | Issued |
Array
(
[id] => 4190677
[patent_doc_number] => 06160303
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[patent_kind] => NA
[patent_issue_date] => 2000-12-12
[patent_title] => 'Monolithic inductor with guard rings'
[patent_app_type] => 1
[patent_app_number] => 9/140255
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[pdf_file] => patents/06/160/06160303.pdf
[firstpage_image] =>[orig_patent_app_number] => 140255
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/140255 | Monolithic inductor with guard rings | Aug 25, 1998 | Issued |
Array
(
[id] => 3950387
[patent_doc_number] => 05990539
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[patent_kind] => NA
[patent_issue_date] => 1999-11-23
[patent_title] => 'Transistor component having an integrated emitter resistor'
[patent_app_type] => 1
[patent_app_number] => 9/129376
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[firstpage_image] =>[orig_patent_app_number] => 129376
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/129376 | Transistor component having an integrated emitter resistor | Aug 4, 1998 | Issued |
Array
(
[id] => 4297124
[patent_doc_number] => 06236071
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[patent_issue_date] => 2001-05-22
[patent_title] => 'Transistor having a novel layout and an emitter having more than one feed point'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/126301 | Transistor having a novel layout and an emitter having more than one feed point | Jul 29, 1998 | Issued |
Array
(
[id] => 4410691
[patent_doc_number] => 06271563
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[patent_issue_date] => 2001-08-07
[patent_title] => 'MOS transistor with high-K spacer designed for ultra-large-scale integration'
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[patent_app_number] => 9/122815
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[pdf_file] => patents/06/271/06271563.pdf
[firstpage_image] =>[orig_patent_app_number] => 122815
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/122815 | MOS transistor with high-K spacer designed for ultra-large-scale integration | Jul 26, 1998 | Issued |
Array
(
[id] => 5997057
[patent_doc_number] => 20020027227
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2002-03-07
[patent_title] => 'SEMICONDUCTOR MEMORY DEVICE HAVING A TRENCH AND A GATE ELECTRODE VERTICALLY FORMED ON A WALL OF THE TRENCH'
[patent_app_type] => new
[patent_app_number] => 09/120116
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[pdf_file] => publications/A1/0027/20020027227.pdf
[firstpage_image] =>[orig_patent_app_number] => 09120116
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/120116 | Semiconductor memory device having a trench and a gate electrode vertically formed on a wall of the trench | Jul 21, 1998 | Issued |
Array
(
[id] => 4187498
[patent_doc_number] => 06020643
[patent_country] => US
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[patent_issue_date] => 2000-02-01
[patent_title] => 'Semiconductor memory device having contact holes of differing structure'
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[patent_app_number] => 9/115228
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[firstpage_image] =>[orig_patent_app_number] => 115228
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/115228 | Semiconductor memory device having contact holes of differing structure | Jul 13, 1998 | Issued |
Array
(
[id] => 4318246
[patent_doc_number] => 06316835
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[patent_kind] => NA
[patent_issue_date] => 2001-11-13
[patent_title] => 'Method for forming zig-zag bordered openings in semiconductor structures and structures formed'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/113625 | Method for forming zig-zag bordered openings in semiconductor structures and structures formed | Jul 9, 1998 | Issued |
Array
(
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[patent_title] => 'Shallow trench isolation process particularly suited for high voltage circuits'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/109755 | Shallow trench isolation process particularly suited for high voltage circuits | Jul 1, 1998 | Issued |
Array
(
[id] => 1448053
[patent_doc_number] => 06369420
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[patent_issue_date] => 2002-04-09
[patent_title] => 'Method of self-aligning a floating gate to a control gate and to an isolation in an electrically erasable and programmable memory cell, and a cell made thereby'
[patent_app_type] => B1
[patent_app_number] => 09/110115
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/110115 | Method of self-aligning a floating gate to a control gate and to an isolation in an electrically erasable and programmable memory cell, and a cell made thereby | Jul 1, 1998 | Issued |
| 09/000255 | MODULATION-DOPED FIELD-EFFECT TRANSISTOR WITH A COMPOSITION- MODULATED BARRIER STRUCTURE | Jun 18, 1998 | Abandoned |