| Application number | Title of the application | Filing Date | Status |
|---|
Array
(
[id] => 1587843
[patent_doc_number] => 06359316
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2002-03-19
[patent_title] => 'Method and apparatus to prevent latch-up in CMOS devices'
[patent_app_type] => B1
[patent_app_number] => 08/933562
[patent_app_country] => US
[patent_app_date] => 1997-09-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 6
[patent_no_of_words] => 4572
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 166
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/359/06359316.pdf
[firstpage_image] =>[orig_patent_app_number] => 08933562
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/933562 | Method and apparatus to prevent latch-up in CMOS devices | Sep 18, 1997 | Issued |
Array
(
[id] => 4144901
[patent_doc_number] => 06060725
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-05-09
[patent_title] => 'Thin film transistor using a semiconductor film'
[patent_app_type] => 1
[patent_app_number] => 8/933342
[patent_app_country] => US
[patent_app_date] => 1997-09-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 20
[patent_no_of_words] => 6058
[patent_no_of_claims] => 22
[patent_no_of_ind_claims] => 9
[patent_words_short_claim] => 116
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/060/06060725.pdf
[firstpage_image] =>[orig_patent_app_number] => 933342
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/933342 | Thin film transistor using a semiconductor film | Sep 18, 1997 | Issued |
Array
(
[id] => 4361319
[patent_doc_number] => 06201295
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-03-13
[patent_title] => 'Plate-shaped external storage device and method of producing the same'
[patent_app_type] => 1
[patent_app_number] => 8/933309
[patent_app_country] => US
[patent_app_date] => 1997-09-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 9
[patent_no_of_words] => 4232
[patent_no_of_claims] => 3
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 248
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/201/06201295.pdf
[firstpage_image] =>[orig_patent_app_number] => 933309
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/933309 | Plate-shaped external storage device and method of producing the same | Sep 17, 1997 | Issued |
| 08/932832 | BIPOLAR TRANSISTOR AND METHOD OF FABRICATING THE SAME | Sep 17, 1997 | Abandoned |
Array
(
[id] => 4080156
[patent_doc_number] => 05965912
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-10-12
[patent_title] => 'Variable capacitor and method for fabricating the same'
[patent_app_type] => 1
[patent_app_number] => 8/929123
[patent_app_country] => US
[patent_app_date] => 1997-09-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 2
[patent_no_of_words] => 3272
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 148
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/965/05965912.pdf
[firstpage_image] =>[orig_patent_app_number] => 929123
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/929123 | Variable capacitor and method for fabricating the same | Sep 2, 1997 | Issued |
Array
(
[id] => 3999159
[patent_doc_number] => 05920104
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-07-06
[patent_title] => 'Reducing reverse short-channel effect with light dose of P with high dose of as in n-channel LDD'
[patent_app_type] => 1
[patent_app_number] => 8/922504
[patent_app_country] => US
[patent_app_date] => 1997-09-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 16
[patent_no_of_words] => 3638
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 176
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/920/05920104.pdf
[firstpage_image] =>[orig_patent_app_number] => 922504
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/922504 | Reducing reverse short-channel effect with light dose of P with high dose of as in n-channel LDD | Sep 2, 1997 | Issued |
| 08/917882 | SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME | Aug 26, 1997 | Abandoned |
Array
(
[id] => 4101469
[patent_doc_number] => 06097053
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-08-01
[patent_title] => 'Semiconductor device having a multi-wall cylindrical capacitor'
[patent_app_type] => 1
[patent_app_number] => 8/916061
[patent_app_country] => US
[patent_app_date] => 1997-08-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 12
[patent_no_of_words] => 3563
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 154
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/097/06097053.pdf
[firstpage_image] =>[orig_patent_app_number] => 916061
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/916061 | Semiconductor device having a multi-wall cylindrical capacitor | Aug 20, 1997 | Issued |
| 08/915841 | BONDED WAFER PROCESSING WITH METAL SILICIDATION | Aug 20, 1997 | Abandoned |
Array
(
[id] => 1524859
[patent_doc_number] => 06353244
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2002-03-05
[patent_title] => 'Semiconductor device and manufacturing method thereof'
[patent_app_type] => B1
[patent_app_number] => 08/908281
[patent_app_country] => US
[patent_app_date] => 1997-08-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 12
[patent_no_of_words] => 5603
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 7
[patent_words_short_claim] => 59
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/353/06353244.pdf
[firstpage_image] =>[orig_patent_app_number] => 08908281
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/908281 | Semiconductor device and manufacturing method thereof | Aug 6, 1997 | Issued |
Array
(
[id] => 4140629
[patent_doc_number] => 06015996
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-01-18
[patent_title] => 'Cell structure of an improved CMOS static RAM and its fabrication method'
[patent_app_type] => 1
[patent_app_number] => 8/906433
[patent_app_country] => US
[patent_app_date] => 1997-08-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 16
[patent_no_of_words] => 4684
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 113
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/015/06015996.pdf
[firstpage_image] =>[orig_patent_app_number] => 906433
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/906433 | Cell structure of an improved CMOS static RAM and its fabrication method | Aug 4, 1997 | Issued |
Array
(
[id] => 4242229
[patent_doc_number] => 06144046
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-11-07
[patent_title] => 'Power inverter having series connection of semiconductor devices each having an inverse parallel connection of an insulated gate bipolar transistor and a diode'
[patent_app_type] => 1
[patent_app_number] => 8/902332
[patent_app_country] => US
[patent_app_date] => 1997-07-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 12
[patent_no_of_words] => 5270
[patent_no_of_claims] => 22
[patent_no_of_ind_claims] => 6
[patent_words_short_claim] => 133
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/144/06144046.pdf
[firstpage_image] =>[orig_patent_app_number] => 902332
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/902332 | Power inverter having series connection of semiconductor devices each having an inverse parallel connection of an insulated gate bipolar transistor and a diode | Jul 28, 1997 | Issued |
Array
(
[id] => 3909065
[patent_doc_number] => 05898201
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-04-27
[patent_title] => 'Low resistance, high breakdown voltage, power mosfet'
[patent_app_type] => 1
[patent_app_number] => 8/900922
[patent_app_country] => US
[patent_app_date] => 1997-07-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 17
[patent_no_of_words] => 4233
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 217
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/898/05898201.pdf
[firstpage_image] =>[orig_patent_app_number] => 900922
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/900922 | Low resistance, high breakdown voltage, power mosfet | Jul 27, 1997 | Issued |
Array
(
[id] => 4054105
[patent_doc_number] => 05869871
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-02-09
[patent_title] => 'Semiconductor device capable of avoiding damage by ESD'
[patent_app_type] => 1
[patent_app_number] => 8/896952
[patent_app_country] => US
[patent_app_date] => 1997-07-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 11
[patent_no_of_words] => 2927
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 163
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/869/05869871.pdf
[firstpage_image] =>[orig_patent_app_number] => 896952
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/896952 | Semiconductor device capable of avoiding damage by ESD | Jul 17, 1997 | Issued |
Array
(
[id] => 4108357
[patent_doc_number] => 06051858
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-04-18
[patent_title] => 'Ferroelectric/high dielectric constant integrated circuit and method of fabricating same'
[patent_app_type] => 1
[patent_app_number] => 8/892699
[patent_app_country] => US
[patent_app_date] => 1997-07-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 57
[patent_no_of_words] => 18569
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 68
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/051/06051858.pdf
[firstpage_image] =>[orig_patent_app_number] => 892699
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/892699 | Ferroelectric/high dielectric constant integrated circuit and method of fabricating same | Jul 14, 1997 | Issued |
Array
(
[id] => 4190600
[patent_doc_number] => 06160298
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-12-12
[patent_title] => 'Full CMOS SRAM cell comprising Vcc and Vss buses on both sides of each of complementary data lines on a single level'
[patent_app_type] => 1
[patent_app_number] => 8/893780
[patent_app_country] => US
[patent_app_date] => 1997-07-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 12
[patent_no_of_words] => 7591
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 134
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/160/06160298.pdf
[firstpage_image] =>[orig_patent_app_number] => 893780
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/893780 | Full CMOS SRAM cell comprising Vcc and Vss buses on both sides of each of complementary data lines on a single level | Jul 10, 1997 | Issued |
Array
(
[id] => 3989649
[patent_doc_number] => 05959324
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-09-28
[patent_title] => 'Semiconductor device including an improved terminal structure'
[patent_app_type] => 1
[patent_app_number] => 8/890376
[patent_app_country] => US
[patent_app_date] => 1997-07-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 28
[patent_no_of_words] => 5315
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 9
[patent_words_short_claim] => 223
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/959/05959324.pdf
[firstpage_image] =>[orig_patent_app_number] => 890376
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/890376 | Semiconductor device including an improved terminal structure | Jul 10, 1997 | Issued |
Array
(
[id] => 4120101
[patent_doc_number] => 06046493
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-04-04
[patent_title] => 'Semiconductor device with special emitter connection'
[patent_app_type] => 1
[patent_app_number] => 8/887980
[patent_app_country] => US
[patent_app_date] => 1997-07-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 12
[patent_no_of_words] => 3886
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 191
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/046/06046493.pdf
[firstpage_image] =>[orig_patent_app_number] => 887980
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/887980 | Semiconductor device with special emitter connection | Jul 2, 1997 | Issued |
Array
(
[id] => 4017081
[patent_doc_number] => 05962897
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-10-05
[patent_title] => 'Semiconductor device and method for forming the same'
[patent_app_type] => 1
[patent_app_number] => 8/886139
[patent_app_country] => US
[patent_app_date] => 1997-06-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 62
[patent_no_of_words] => 15403
[patent_no_of_claims] => 26
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 129
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/962/05962897.pdf
[firstpage_image] =>[orig_patent_app_number] => 886139
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/886139 | Semiconductor device and method for forming the same | Jun 29, 1997 | Issued |
Array
(
[id] => 4183953
[patent_doc_number] => 06037628
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-03-14
[patent_title] => 'Semiconductor structures with trench contacts'
[patent_app_type] => 1
[patent_app_number] => 8/885922
[patent_app_country] => US
[patent_app_date] => 1997-06-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 15
[patent_no_of_words] => 1269
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 88
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/037/06037628.pdf
[firstpage_image] =>[orig_patent_app_number] => 885922
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/885922 | Semiconductor structures with trench contacts | Jun 29, 1997 | Issued |