Search

Devon C. Kramer

Supervisory Patent Examiner (ID: 1983, Phone: (571)272-7118 , Office: P/3746 )

Most Active Art Unit
3683
Art Unit(s)
3683, 3741, 3613, 3746
Total Applications
1035
Issued Applications
672
Pending Applications
81
Abandoned Applications
283

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 3766601 [patent_doc_number] => 05844284 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-12-01 [patent_title] => 'Damage free buried contact using salicide technology' [patent_app_type] => 1 [patent_app_number] => 8/787589 [patent_app_country] => US [patent_app_date] => 1997-01-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 23 [patent_no_of_words] => 2803 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/844/05844284.pdf [firstpage_image] =>[orig_patent_app_number] => 787589 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/787589
Damage free buried contact using salicide technology Jan 21, 1997 Issued
Array ( [id] => 3980588 [patent_doc_number] => 05917220 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-06-29 [patent_title] => 'Integrated circuit with improved overvoltage protection' [patent_app_type] => 1 [patent_app_number] => 8/777784 [patent_app_country] => US [patent_app_date] => 1996-12-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 8 [patent_no_of_words] => 6676 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 33 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/917/05917220.pdf [firstpage_image] =>[orig_patent_app_number] => 777784 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/777784
Integrated circuit with improved overvoltage protection Dec 30, 1996 Issued
Array ( [id] => 3745330 [patent_doc_number] => 05753955 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-05-19 [patent_title] => 'MOS device having a gate to body connection with a body injection current limiting feature for use on silicon on insulator substrates' [patent_app_type] => 1 [patent_app_number] => 8/770616 [patent_app_country] => US [patent_app_date] => 1996-12-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 1821 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 131 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/753/05753955.pdf [firstpage_image] =>[orig_patent_app_number] => 770616 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/770616
MOS device having a gate to body connection with a body injection current limiting feature for use on silicon on insulator substrates Dec 18, 1996 Issued
Array ( [id] => 5948568 [patent_doc_number] => 20020005555 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-01-17 [patent_title] => 'SEMICONDUCTOR DEVICE COMPRISING A SILICON BODY WITH BIPOLAR AND MOS TRANSISTORS' [patent_app_type] => new [patent_app_number] => 08/768488 [patent_app_country] => US [patent_app_date] => 1996-12-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2024 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0005/20020005555.pdf [firstpage_image] =>[orig_patent_app_number] => 08768488 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/768488
SEMICONDUCTOR DEVICE COMPRISING A SILICON BODY WITH BIPOLAR AND MOS TRANSISTORS Dec 17, 1996 Abandoned
Array ( [id] => 3892597 [patent_doc_number] => 05777373 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-07-07 [patent_title] => 'Semiconductor structure with field-limiting rings and method for making' [patent_app_type] => 1 [patent_app_number] => 8/767438 [patent_app_country] => US [patent_app_date] => 1996-12-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 1 [patent_no_of_words] => 2220 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 375 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/777/05777373.pdf [firstpage_image] =>[orig_patent_app_number] => 767438 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/767438
Semiconductor structure with field-limiting rings and method for making Dec 15, 1996 Issued
Array ( [id] => 3918099 [patent_doc_number] => 06002153 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-12-14 [patent_title] => 'MOS type semiconductor device with a current detecting function' [patent_app_type] => 1 [patent_app_number] => 8/760806 [patent_app_country] => US [patent_app_date] => 1996-12-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 11 [patent_no_of_words] => 4903 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 236 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/002/06002153.pdf [firstpage_image] =>[orig_patent_app_number] => 760806 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/760806
MOS type semiconductor device with a current detecting function Dec 4, 1996 Issued
Array ( [id] => 3892169 [patent_doc_number] => 05894154 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-04-13 [patent_title] => 'P-channel MOS transistor' [patent_app_type] => 1 [patent_app_number] => 8/761052 [patent_app_country] => US [patent_app_date] => 1996-12-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 15 [patent_no_of_words] => 2932 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 1336 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/894/05894154.pdf [firstpage_image] =>[orig_patent_app_number] => 761052 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/761052
P-channel MOS transistor Dec 4, 1996 Issued
Array ( [id] => 3801572 [patent_doc_number] => 05828081 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-10-27 [patent_title] => 'Integrated semiconductor device' [patent_app_type] => 1 [patent_app_number] => 8/759177 [patent_app_country] => US [patent_app_date] => 1996-12-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 20 [patent_no_of_words] => 2623 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/828/05828081.pdf [firstpage_image] =>[orig_patent_app_number] => 759177 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/759177
Integrated semiconductor device Dec 3, 1996 Issued
Array ( [id] => 3882644 [patent_doc_number] => 05804856 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-09-08 [patent_title] => 'Depleted sidewall-poly LDD transistor' [patent_app_type] => 1 [patent_app_number] => 8/753616 [patent_app_country] => US [patent_app_date] => 1996-11-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 6 [patent_no_of_words] => 4906 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 230 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/804/05804856.pdf [firstpage_image] =>[orig_patent_app_number] => 753616 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/753616
Depleted sidewall-poly LDD transistor Nov 26, 1996 Issued
Array ( [id] => 3820640 [patent_doc_number] => 05789788 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-08-04 [patent_title] => 'Semiconductor device with first and second wells which have opposite conductivity types and a third well region formed on one of the first and second wells' [patent_app_type] => 1 [patent_app_number] => 8/754615 [patent_app_country] => US [patent_app_date] => 1996-11-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 22 [patent_no_of_words] => 8182 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/789/05789788.pdf [firstpage_image] =>[orig_patent_app_number] => 754615 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/754615
Semiconductor device with first and second wells which have opposite conductivity types and a third well region formed on one of the first and second wells Nov 19, 1996 Issued
Array ( [id] => 3879135 [patent_doc_number] => 05763926 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-06-09 [patent_title] => 'Semiconductor device having a Bi-CMOS transistor including an n-channel MOS transistor' [patent_app_type] => 1 [patent_app_number] => 8/742120 [patent_app_country] => US [patent_app_date] => 1996-10-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 20 [patent_no_of_words] => 4081 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 215 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/763/05763926.pdf [firstpage_image] =>[orig_patent_app_number] => 742120 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/742120
Semiconductor device having a Bi-CMOS transistor including an n-channel MOS transistor Oct 30, 1996 Issued
08/734084 SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME Oct 20, 1996 Abandoned
Array ( [id] => 3692413 [patent_doc_number] => 05696396 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-12-09 [patent_title] => 'Semiconductor device including vertical MOSFET structure with suppressed parasitic diode operation' [patent_app_type] => 1 [patent_app_number] => 8/734132 [patent_app_country] => US [patent_app_date] => 1996-10-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 18 [patent_no_of_words] => 6582 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 396 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/696/05696396.pdf [firstpage_image] =>[orig_patent_app_number] => 734132 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/734132
Semiconductor device including vertical MOSFET structure with suppressed parasitic diode operation Oct 20, 1996 Issued
Array ( [id] => 4069992 [patent_doc_number] => 05866932 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-02-02 [patent_title] => 'Insulating film formed using an organic silane and method of producing semiconductor device' [patent_app_type] => 1 [patent_app_number] => 8/734127 [patent_app_country] => US [patent_app_date] => 1996-10-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 10 [patent_no_of_words] => 4166 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 40 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/866/05866932.pdf [firstpage_image] =>[orig_patent_app_number] => 734127 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/734127
Insulating film formed using an organic silane and method of producing semiconductor device Oct 20, 1996 Issued
Array ( [id] => 3933204 [patent_doc_number] => 05877539 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-03-02 [patent_title] => 'Bipolar transistor with a reduced collector series resistance' [patent_app_type] => 1 [patent_app_number] => 8/727088 [patent_app_country] => US [patent_app_date] => 1996-10-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 37 [patent_no_of_words] => 9340 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 248 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/877/05877539.pdf [firstpage_image] =>[orig_patent_app_number] => 727088 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/727088
Bipolar transistor with a reduced collector series resistance Oct 6, 1996 Issued
Array ( [id] => 3933204 [patent_doc_number] => 05877539 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-03-02 [patent_title] => 'Bipolar transistor with a reduced collector series resistance' [patent_app_type] => 1 [patent_app_number] => 8/727088 [patent_app_country] => US [patent_app_date] => 1996-10-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 37 [patent_no_of_words] => 9340 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 248 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/877/05877539.pdf [firstpage_image] =>[orig_patent_app_number] => 727088 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/727088
Bipolar transistor with a reduced collector series resistance Oct 6, 1996 Issued
Array ( [id] => 3933204 [patent_doc_number] => 05877539 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-03-02 [patent_title] => 'Bipolar transistor with a reduced collector series resistance' [patent_app_type] => 1 [patent_app_number] => 8/727088 [patent_app_country] => US [patent_app_date] => 1996-10-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 37 [patent_no_of_words] => 9340 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 248 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/877/05877539.pdf [firstpage_image] =>[orig_patent_app_number] => 727088 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/727088
Bipolar transistor with a reduced collector series resistance Oct 6, 1996 Issued
Array ( [id] => 3933204 [patent_doc_number] => 05877539 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-03-02 [patent_title] => 'Bipolar transistor with a reduced collector series resistance' [patent_app_type] => 1 [patent_app_number] => 8/727088 [patent_app_country] => US [patent_app_date] => 1996-10-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 37 [patent_no_of_words] => 9340 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 248 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/877/05877539.pdf [firstpage_image] =>[orig_patent_app_number] => 727088 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/727088
Bipolar transistor with a reduced collector series resistance Oct 6, 1996 Issued
Array ( [id] => 5885804 [patent_doc_number] => 20020011621 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-01-31 [patent_title] => 'SEMICONDUCTOR NONVOLATILE MEMORY WITH LOW PROGRAMMING VOLTAGE' [patent_app_type] => new [patent_app_number] => 08/726865 [patent_app_country] => US [patent_app_date] => 1996-10-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 4722 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 500 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0011/20020011621.pdf [firstpage_image] =>[orig_patent_app_number] => 08726865 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/726865
Semiconductor nonvolatile memory with low programming voltage Oct 3, 1996 Issued
Array ( [id] => 4113146 [patent_doc_number] => 06057568 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-05-02 [patent_title] => 'Application specific integrated circuit semiconductor device having MOS transistor with reduced gate resistance' [patent_app_type] => 1 [patent_app_number] => 8/719203 [patent_app_country] => US [patent_app_date] => 1996-09-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 19 [patent_no_of_words] => 5415 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 259 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/057/06057568.pdf [firstpage_image] =>[orig_patent_app_number] => 719203 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/719203
Application specific integrated circuit semiconductor device having MOS transistor with reduced gate resistance Sep 24, 1996 Issued
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