Search

Devon C. Kramer

Supervisory Patent Examiner (ID: 1983, Phone: (571)272-7118 , Office: P/3746 )

Most Active Art Unit
3683
Art Unit(s)
3683, 3741, 3613, 3746
Total Applications
1035
Issued Applications
672
Pending Applications
81
Abandoned Applications
283

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 4243946 [patent_doc_number] => 06091111 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-07-18 [patent_title] => 'High voltage mos device having an extended drain region with different dopant species' [patent_app_type] => 1 [patent_app_number] => 8/715711 [patent_app_country] => US [patent_app_date] => 1996-09-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 19 [patent_no_of_words] => 3139 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 157 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/091/06091111.pdf [firstpage_image] =>[orig_patent_app_number] => 715711 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/715711
High voltage mos device having an extended drain region with different dopant species Sep 18, 1996 Issued
Array ( [id] => 4038120 [patent_doc_number] => 05994752 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-11-30 [patent_title] => 'Field-effect-controllable semiconductor component with a plurality of temperature sensors' [patent_app_type] => 1 [patent_app_number] => 8/715426 [patent_app_country] => US [patent_app_date] => 1996-09-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 5 [patent_no_of_words] => 2202 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/994/05994752.pdf [firstpage_image] =>[orig_patent_app_number] => 715426 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/715426
Field-effect-controllable semiconductor component with a plurality of temperature sensors Sep 17, 1996 Issued
Array ( [id] => 3908865 [patent_doc_number] => 05898187 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-04-27 [patent_title] => 'Thin film transistor' [patent_app_type] => 1 [patent_app_number] => 8/713074 [patent_app_country] => US [patent_app_date] => 1996-09-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 18 [patent_no_of_words] => 3074 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/898/05898187.pdf [firstpage_image] =>[orig_patent_app_number] => 713074 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/713074
Thin film transistor Sep 11, 1996 Issued
Array ( [id] => 4197224 [patent_doc_number] => 06043519 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-03-28 [patent_title] => 'Junction high electron mobility transistor-heterojunction bipolar transistor (JHEMT-HBT) monolithic microwave integrated circuit (MMIC) and single growth method of fabrication' [patent_app_type] => 1 [patent_app_number] => 8/712824 [patent_app_country] => US [patent_app_date] => 1996-09-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 13 [patent_no_of_words] => 4572 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 201 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/043/06043519.pdf [firstpage_image] =>[orig_patent_app_number] => 712824 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/712824
Junction high electron mobility transistor-heterojunction bipolar transistor (JHEMT-HBT) monolithic microwave integrated circuit (MMIC) and single growth method of fabrication Sep 11, 1996 Issued
Array ( [id] => 3913978 [patent_doc_number] => 05835986 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-11-10 [patent_title] => 'Electrostatic discharge (ESD) structure and buffer driver structure for providing ESD and latchup protection for integrated circuit structures in minimized I/O space' [patent_app_type] => 1 [patent_app_number] => 8/708258 [patent_app_country] => US [patent_app_date] => 1996-09-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 3781 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/835/05835986.pdf [firstpage_image] =>[orig_patent_app_number] => 708258 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/708258
Electrostatic discharge (ESD) structure and buffer driver structure for providing ESD and latchup protection for integrated circuit structures in minimized I/O space Sep 5, 1996 Issued
08/707036 CONDUCTIVE SPACER LIGHTLY DOPED DRAIN (LDD) FOR HOT CARRIER EFFECT (HCE) CONTROL Sep 2, 1996 Abandoned
Array ( [id] => 3903971 [patent_doc_number] => 05751054 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-05-12 [patent_title] => 'Zener diodes on the same wafer with BiCDMOS structures' [patent_app_type] => 1 [patent_app_number] => 8/705910 [patent_app_country] => US [patent_app_date] => 1996-08-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 42 [patent_figures_cnt] => 42 [patent_no_of_words] => 13284 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 267 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/751/05751054.pdf [firstpage_image] =>[orig_patent_app_number] => 705910 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/705910
Zener diodes on the same wafer with BiCDMOS structures Aug 28, 1996 Issued
Array ( [id] => 3788582 [patent_doc_number] => 05821600 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-10-13 [patent_title] => 'Isolation by active transistors with grounded gates' [patent_app_type] => 1 [patent_app_number] => 8/704153 [patent_app_country] => US [patent_app_date] => 1996-08-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 12 [patent_no_of_words] => 3299 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/821/05821600.pdf [firstpage_image] =>[orig_patent_app_number] => 704153 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/704153
Isolation by active transistors with grounded gates Aug 27, 1996 Issued
Array ( [id] => 4055959 [patent_doc_number] => 05969385 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-10-19 [patent_title] => 'Ultra-low power-delay product NNN/PPP logic devices' [patent_app_type] => 1 [patent_app_number] => 8/689946 [patent_app_country] => US [patent_app_date] => 1996-08-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 3614 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/969/05969385.pdf [firstpage_image] =>[orig_patent_app_number] => 689946 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/689946
Ultra-low power-delay product NNN/PPP logic devices Aug 15, 1996 Issued
Array ( [id] => 4242717 [patent_doc_number] => 06144078 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-11-07 [patent_title] => 'Methods for programming read-only memory cells and associated memories' [patent_app_type] => 1 [patent_app_number] => 8/688298 [patent_app_country] => US [patent_app_date] => 1996-07-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 9 [patent_no_of_words] => 2421 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 12 [patent_words_short_claim] => 131 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/144/06144078.pdf [firstpage_image] =>[orig_patent_app_number] => 688298 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/688298
Methods for programming read-only memory cells and associated memories Jul 29, 1996 Issued
Array ( [id] => 3932781 [patent_doc_number] => 05877512 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-03-02 [patent_title] => 'Liquid crystal display device having uniform parasitic capacitance between pixels' [patent_app_type] => 1 [patent_app_number] => 8/686952 [patent_app_country] => US [patent_app_date] => 1996-07-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 4414 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 153 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/877/05877512.pdf [firstpage_image] =>[orig_patent_app_number] => 686952 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/686952
Liquid crystal display device having uniform parasitic capacitance between pixels Jul 25, 1996 Issued
08/681038 BONDED WAFER PROCESSING WITH METAL SILICIDATION Jul 21, 1996 Abandoned
Array ( [id] => 1568422 [patent_doc_number] => 06376891 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-04-23 [patent_title] => 'High voltage breakdown isolation semiconductor device and manufacturing process for making the device' [patent_app_type] => B1 [patent_app_number] => 08/684558 [patent_app_country] => US [patent_app_date] => 1996-07-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 24 [patent_no_of_words] => 11926 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 206 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/376/06376891.pdf [firstpage_image] =>[orig_patent_app_number] => 08684558 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/684558
High voltage breakdown isolation semiconductor device and manufacturing process for making the device Jul 18, 1996 Issued
Array ( [id] => 4030650 [patent_doc_number] => 05883413 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-03-16 [patent_title] => 'Lateral high-voltage DMOS transistor with drain zone charge draining' [patent_app_type] => 1 [patent_app_number] => 8/687110 [patent_app_country] => US [patent_app_date] => 1996-07-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 3 [patent_no_of_words] => 3112 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 254 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/883/05883413.pdf [firstpage_image] =>[orig_patent_app_number] => 687110 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/687110
Lateral high-voltage DMOS transistor with drain zone charge draining Jul 15, 1996 Issued
Array ( [id] => 3666670 [patent_doc_number] => 05625216 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-04-29 [patent_title] => 'MOS transistor having increased gate-drain capacitance' [patent_app_type] => 1 [patent_app_number] => 8/674043 [patent_app_country] => US [patent_app_date] => 1996-07-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 7 [patent_no_of_words] => 2096 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 209 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/625/05625216.pdf [firstpage_image] =>[orig_patent_app_number] => 674043 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/674043
MOS transistor having increased gate-drain capacitance Jun 30, 1996 Issued
Array ( [id] => 3661963 [patent_doc_number] => 05659190 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-08-19 [patent_title] => 'Semiconductor device in a thin active layer with high breakdown voltage' [patent_app_type] => 1 [patent_app_number] => 8/669848 [patent_app_country] => US [patent_app_date] => 1996-06-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 26 [patent_no_of_words] => 7446 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 451 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/659/05659190.pdf [firstpage_image] =>[orig_patent_app_number] => 669848 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/669848
Semiconductor device in a thin active layer with high breakdown voltage Jun 25, 1996 Issued
Array ( [id] => 4054065 [patent_doc_number] => 05869868 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-02-09 [patent_title] => 'SOI trench DRAM cell for 256 MB DRAM and beyond' [patent_app_type] => 1 [patent_app_number] => 8/673636 [patent_app_country] => US [patent_app_date] => 1996-06-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 11 [patent_no_of_words] => 1239 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/869/05869868.pdf [firstpage_image] =>[orig_patent_app_number] => 673636 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/673636
SOI trench DRAM cell for 256 MB DRAM and beyond Jun 25, 1996 Issued
Array ( [id] => 7639838 [patent_doc_number] => 06396078 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-05-28 [patent_title] => 'Semiconductor device with a tapered hole formed using multiple layers with different etching rates' [patent_app_type] => B1 [patent_app_number] => 08/666104 [patent_app_country] => US [patent_app_date] => 1996-06-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 25 [patent_no_of_words] => 7268 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 5 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/396/06396078.pdf [firstpage_image] =>[orig_patent_app_number] => 08666104 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/666104
Semiconductor device with a tapered hole formed using multiple layers with different etching rates Jun 18, 1996 Issued
Array ( [id] => 3665076 [patent_doc_number] => 05656843 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-08-12 [patent_title] => 'Semiconductor device having a vertical insulated gate field effect device and a breakdown region remote from the gate' [patent_app_type] => 1 [patent_app_number] => 8/668426 [patent_app_country] => US [patent_app_date] => 1996-06-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 8 [patent_no_of_words] => 5087 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 262 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/656/05656843.pdf [firstpage_image] =>[orig_patent_app_number] => 668426 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/668426
Semiconductor device having a vertical insulated gate field effect device and a breakdown region remote from the gate Jun 12, 1996 Issued
Array ( [id] => 3950608 [patent_doc_number] => RE036314 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-09-28 [patent_title] => 'Insulated gate field effect semiconductor devices having a LDD region and an anodic oxide film of a gate electrode' [patent_app_type] => 2 [patent_app_number] => 8/620857 [patent_app_country] => US [patent_app_date] => 1996-06-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 38 [patent_no_of_words] => 8907 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/RE/036/RE036314.pdf [firstpage_image] =>[orig_patent_app_number] => 620857 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/620857
Insulated gate field effect semiconductor devices having a LDD region and an anodic oxide film of a gate electrode Jun 3, 1996 Issued
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