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Devon C. Kramer

Supervisory Patent Examiner (ID: 1983, Phone: (571)272-7118 , Office: P/3746 )

Most Active Art Unit
3683
Art Unit(s)
3683, 3741, 3613, 3746
Total Applications
1035
Issued Applications
672
Pending Applications
81
Abandoned Applications
283

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 1063594 [patent_doc_number] => 06849872 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2005-02-01 [patent_title] => 'Thin film transistor' [patent_app_type] => utility [patent_app_number] => 08/202680 [patent_app_country] => US [patent_app_date] => 1994-02-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 7055 [patent_no_of_claims] => 104 [patent_no_of_ind_claims] => 48 [patent_words_short_claim] => 19 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/849/06849872.pdf [firstpage_image] =>[orig_patent_app_number] => 08202680 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/202680
Thin film transistor Feb 24, 1994 Issued
Array ( [id] => 3493899 [patent_doc_number] => 05471094 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-11-28 [patent_title] => 'Self-aligned via structure' [patent_app_type] => 1 [patent_app_number] => 8/201437 [patent_app_country] => US [patent_app_date] => 1994-02-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 11 [patent_no_of_words] => 2896 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 189 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/471/05471094.pdf [firstpage_image] =>[orig_patent_app_number] => 201437 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/201437
Self-aligned via structure Feb 23, 1994 Issued
Array ( [id] => 3534248 [patent_doc_number] => 05583365 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-12-10 [patent_title] => 'Fully depleted lateral transistor' [patent_app_type] => 1 [patent_app_number] => 8/200396 [patent_app_country] => US [patent_app_date] => 1994-02-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 10 [patent_no_of_words] => 5303 [patent_no_of_claims] => 54 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 74 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/583/05583365.pdf [firstpage_image] =>[orig_patent_app_number] => 200396 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/200396
Fully depleted lateral transistor Feb 22, 1994 Issued
08/198779 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE DEVICE Feb 17, 1994 Abandoned
08/195092 SURFACE COUNTER-DOPED N- LDD FOR HIGH HOT CARRIER RELIABILITY Feb 13, 1994 Abandoned
Array ( [id] => 3517856 [patent_doc_number] => 05512765 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-04-30 [patent_title] => 'Extendable circuit architecture' [patent_app_type] => 1 [patent_app_number] => 8/190910 [patent_app_country] => US [patent_app_date] => 1994-02-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 14 [patent_no_of_words] => 4427 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 212 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/512/05512765.pdf [firstpage_image] =>[orig_patent_app_number] => 190910 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/190910
Extendable circuit architecture Feb 2, 1994 Issued
Array ( [id] => 3498500 [patent_doc_number] => 05508540 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-04-16 [patent_title] => 'Semiconductor integrated circuit device and process of manufacturing the same' [patent_app_type] => 1 [patent_app_number] => 8/190596 [patent_app_country] => US [patent_app_date] => 1994-02-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 40 [patent_figures_cnt] => 48 [patent_no_of_words] => 24454 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 201 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/508/05508540.pdf [firstpage_image] =>[orig_patent_app_number] => 190596 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/190596
Semiconductor integrated circuit device and process of manufacturing the same Feb 1, 1994 Issued
08/189872 SEMICONDUCTOR DEVICE Jan 31, 1994 Abandoned
Array ( [id] => 3415959 [patent_doc_number] => 05412235 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-05-02 [patent_title] => 'Monolithic integrated circuit including gate bias transistor controlling the gate bias applied to an amplifying transistor' [patent_app_type] => 1 [patent_app_number] => 8/186924 [patent_app_country] => US [patent_app_date] => 1994-01-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 5861 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 238 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/412/05412235.pdf [firstpage_image] =>[orig_patent_app_number] => 186924 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/186924
Monolithic integrated circuit including gate bias transistor controlling the gate bias applied to an amplifying transistor Jan 26, 1994 Issued
08/187570 VERTICAL TRANSISTOR Jan 25, 1994 Abandoned
Array ( [id] => 3627632 [patent_doc_number] => 05612563 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-03-18 [patent_title] => 'Vertically stacked vertical transistors used to form vertical logic gate structures' [patent_app_type] => 1 [patent_app_number] => 8/186872 [patent_app_country] => US [patent_app_date] => 1994-01-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 42 [patent_no_of_words] => 11471 [patent_no_of_claims] => 40 [patent_no_of_ind_claims] => 10 [patent_words_short_claim] => 55 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/612/05612563.pdf [firstpage_image] =>[orig_patent_app_number] => 186872 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/186872
Vertically stacked vertical transistors used to form vertical logic gate structures Jan 24, 1994 Issued
08/185004 SEMICONDUCTOR DEVICE IN A THIN ACTIVE LAYER WITH HIGH BREAKDOWN VOLTAGE Jan 23, 1994 Abandoned
Array ( [id] => 3654420 [patent_doc_number] => 05606200 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-02-25 [patent_title] => 'Resin sealed semiconductor device with improved structural integrity' [patent_app_type] => 1 [patent_app_number] => 8/180481 [patent_app_country] => US [patent_app_date] => 1994-01-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 11 [patent_no_of_words] => 4290 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 104 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/606/05606200.pdf [firstpage_image] =>[orig_patent_app_number] => 180481 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/180481
Resin sealed semiconductor device with improved structural integrity Jan 11, 1994 Issued
08/180784 METAL OXIDE SEMICONDUCTOR AND METHOD OF MAKING THE SAME Jan 4, 1994 Abandoned
08/177818 SEMICONDUCTOR STRUCTURE WITH FIELD-LIMITING RING AND METHOD FOR MAKING Jan 3, 1994 Abandoned
Array ( [id] => 3624569 [patent_doc_number] => 05614752 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-03-25 [patent_title] => 'Semiconductor device containing external surge protection component' [patent_app_type] => 1 [patent_app_number] => 8/177570 [patent_app_country] => US [patent_app_date] => 1994-01-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 25 [patent_no_of_words] => 6386 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 151 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/614/05614752.pdf [firstpage_image] =>[orig_patent_app_number] => 177570 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/177570
Semiconductor device containing external surge protection component Jan 3, 1994 Issued
08/176983 VERTICAL FET DEVICE WITH LOW GATE TO SOURCE OVERLAP CAPACITANCE Jan 2, 1994 Abandoned
08/174022 ARRAY OF THIN FILM TRANSISTOR Dec 27, 1993 Abandoned
08/173050 FIELD EFFECT TRANSISTOR Dec 26, 1993 Abandoned
08/173078 METHOD FOR FORMING A MOS TRANSISTOR AND STRUCTURE THEREOF Dec 26, 1993 Abandoned
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