Search

Devon C. Kramer

Supervisory Patent Examiner (ID: 1983, Phone: (571)272-7118 , Office: P/3746 )

Most Active Art Unit
3683
Art Unit(s)
3683, 3741, 3613, 3746
Total Applications
1035
Issued Applications
672
Pending Applications
81
Abandoned Applications
283

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 3463537 [patent_doc_number] => 05382815 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-01-17 [patent_title] => 'Carrier conduction conductor-insulator semiconductor (CIS) transistor' [patent_app_type] => 1 [patent_app_number] => 8/173388 [patent_app_country] => US [patent_app_date] => 1993-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 7 [patent_no_of_words] => 1820 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/382/05382815.pdf [firstpage_image] =>[orig_patent_app_number] => 173388 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/173388
Carrier conduction conductor-insulator semiconductor (CIS) transistor Dec 22, 1993 Issued
Array ( [id] => 3124159 [patent_doc_number] => 05381031 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-01-10 [patent_title] => 'Semiconductor device with reduced high voltage termination area and high breakdown voltage' [patent_app_type] => 1 [patent_app_number] => 8/172370 [patent_app_country] => US [patent_app_date] => 1993-12-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 3248 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 384 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/381/05381031.pdf [firstpage_image] =>[orig_patent_app_number] => 172370 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/172370
Semiconductor device with reduced high voltage termination area and high breakdown voltage Dec 21, 1993 Issued
Array ( [id] => 3425428 [patent_doc_number] => 05389802 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-02-14 [patent_title] => 'Heterojunction field effect transistor (HJFET) having an improved frequency characteristic' [patent_app_type] => 1 [patent_app_number] => 8/170868 [patent_app_country] => US [patent_app_date] => 1993-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 3120 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 148 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/389/05389802.pdf [firstpage_image] =>[orig_patent_app_number] => 170868 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/170868
Heterojunction field effect transistor (HJFET) having an improved frequency characteristic Dec 20, 1993 Issued
Array ( [id] => 3465831 [patent_doc_number] => 05391903 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-02-21 [patent_title] => 'Selective recrystallization to reduce P-channel transistor leakage in silicon-on-sapphire CMOS radiation hardened integrated circuits' [patent_app_type] => 1 [patent_app_number] => 8/171280 [patent_app_country] => US [patent_app_date] => 1993-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 5 [patent_no_of_words] => 1524 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 151 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/391/05391903.pdf [firstpage_image] =>[orig_patent_app_number] => 171280 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/171280
Selective recrystallization to reduce P-channel transistor leakage in silicon-on-sapphire CMOS radiation hardened integrated circuits Dec 20, 1993 Issued
Array ( [id] => 3463687 [patent_doc_number] => 05382826 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-01-17 [patent_title] => 'Stacked high voltage transistor unit' [patent_app_type] => 1 [patent_app_number] => 8/170848 [patent_app_country] => US [patent_app_date] => 1993-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 10 [patent_no_of_words] => 3529 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 289 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/382/05382826.pdf [firstpage_image] =>[orig_patent_app_number] => 170848 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/170848
Stacked high voltage transistor unit Dec 20, 1993 Issued
Array ( [id] => 3487002 [patent_doc_number] => 05446306 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-08-29 [patent_title] => 'Thin film voltage-tuned semiconductor bulk acoustic resonator (SBAR)' [patent_app_type] => 1 [patent_app_number] => 8/166338 [patent_app_country] => US [patent_app_date] => 1993-12-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 1908 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 148 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/446/05446306.pdf [firstpage_image] =>[orig_patent_app_number] => 166338 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/166338
Thin film voltage-tuned semiconductor bulk acoustic resonator (SBAR) Dec 12, 1993 Issued
08/165602 HIGH VOLTAGE THIN FILM TRANSISTOR HAVING A LINEAR DOPING PROFILE AND METHOD FOR MAKING Dec 8, 1993 Abandoned
08/162300 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SAME Dec 6, 1993 Abandoned
08/160808 METHOD FOR FABRICATING INSULATED GATE SEMICONDUCTOR DEVICE Dec 2, 1993 Abandoned
Array ( [id] => 3498476 [patent_doc_number] => 05508538 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-04-16 [patent_title] => 'Signal processing applications of massively parallel charge domain computing devices' [patent_app_type] => 1 [patent_app_number] => 8/161908 [patent_app_country] => US [patent_app_date] => 1993-11-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 18 [patent_no_of_words] => 6413 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/508/05508538.pdf [firstpage_image] =>[orig_patent_app_number] => 161908 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/161908
Signal processing applications of massively parallel charge domain computing devices Nov 29, 1993 Issued
Array ( [id] => 3110357 [patent_doc_number] => 05418393 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-05-23 [patent_title] => 'Thin-film transistor with fully gated channel region' [patent_app_type] => 1 [patent_app_number] => 8/158560 [patent_app_country] => US [patent_app_date] => 1993-11-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 11 [patent_no_of_words] => 4188 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 144 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/418/05418393.pdf [firstpage_image] =>[orig_patent_app_number] => 158560 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/158560
Thin-film transistor with fully gated channel region Nov 28, 1993 Issued
08/158552 SEMICONDUCTOR DEVICE HAVING INCREASED CAPACITANCE AND METHOD FOR MAKING THE SAME Nov 28, 1993 Abandoned
08/151336 INCREASED DENSITY MOS-GATED SEMICONDUCTOR DEVICES Nov 11, 1993 Abandoned
Array ( [id] => 3491486 [patent_doc_number] => 05475238 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-12-12 [patent_title] => 'Thin film transistor with a sub-gate structure and a drain offset region' [patent_app_type] => 1 [patent_app_number] => 8/150537 [patent_app_country] => US [patent_app_date] => 1993-11-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 4615 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 143 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/475/05475238.pdf [firstpage_image] =>[orig_patent_app_number] => 150537 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/150537
Thin film transistor with a sub-gate structure and a drain offset region Nov 7, 1993 Issued
08/145848 INSULATED-GATE BIPOLAR TRANSISTOR AND PROCESS OF PRODUCING THE SAME Nov 4, 1993 Abandoned
Array ( [id] => 3517935 [patent_doc_number] => 05512771 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-04-30 [patent_title] => 'MOS type semiconductor device having a low concentration impurity diffusion region' [patent_app_type] => 1 [patent_app_number] => 8/147866 [patent_app_country] => US [patent_app_date] => 1993-11-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 40 [patent_no_of_words] => 12658 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 326 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/512/05512771.pdf [firstpage_image] =>[orig_patent_app_number] => 147866 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/147866
MOS type semiconductor device having a low concentration impurity diffusion region Nov 3, 1993 Issued
Array ( [id] => 3413975 [patent_doc_number] => 05461243 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-10-24 [patent_title] => 'Substrate for tensilely strained semiconductor' [patent_app_type] => 1 [patent_app_number] => 8/145986 [patent_app_country] => US [patent_app_date] => 1993-10-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 2 [patent_no_of_words] => 1792 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/461/05461243.pdf [firstpage_image] =>[orig_patent_app_number] => 145986 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/145986
Substrate for tensilely strained semiconductor Oct 28, 1993 Issued
Array ( [id] => 3110175 [patent_doc_number] => 05418383 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-05-23 [patent_title] => 'Semiconductor device capable of previously evaluating characteristics of power output element' [patent_app_type] => 1 [patent_app_number] => 8/143060 [patent_app_country] => US [patent_app_date] => 1993-10-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 7 [patent_no_of_words] => 2618 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 153 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/418/05418383.pdf [firstpage_image] =>[orig_patent_app_number] => 143060 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/143060
Semiconductor device capable of previously evaluating characteristics of power output element Oct 28, 1993 Issued
08/145942 STRUCTURE AND FABRICATION PROCESS OF SILICON ON INSULATOR WAFER Oct 28, 1993 Abandoned
Array ( [id] => 3465898 [patent_doc_number] => 05391908 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-02-21 [patent_title] => 'Lateral insulated gate field effect semiconductor' [patent_app_type] => 1 [patent_app_number] => 8/141467 [patent_app_country] => US [patent_app_date] => 1993-10-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 6 [patent_no_of_words] => 5207 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 262 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/391/05391908.pdf [firstpage_image] =>[orig_patent_app_number] => 141467 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/141467
Lateral insulated gate field effect semiconductor Oct 21, 1993 Issued
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