Search

Devon C. Kramer

Supervisory Patent Examiner (ID: 1983, Phone: (571)272-7118 , Office: P/3746 )

Most Active Art Unit
3683
Art Unit(s)
3683, 3741, 3613, 3746
Total Applications
1035
Issued Applications
672
Pending Applications
81
Abandoned Applications
283

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 3626586 [patent_doc_number] => 05594265 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-01-14 [patent_title] => 'Input protection circuit formed in a semiconductor substrate' [patent_app_type] => 1 [patent_app_number] => 7/799342 [patent_app_country] => US [patent_app_date] => 1991-11-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 17 [patent_no_of_words] => 4518 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 177 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/594/05594265.pdf [firstpage_image] =>[orig_patent_app_number] => 799342 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/799342
Input protection circuit formed in a semiconductor substrate Nov 26, 1991 Issued
Array ( [id] => 2959329 [patent_doc_number] => 05243211 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-09-07 [patent_title] => 'Power FET with shielded channels' [patent_app_type] => 1 [patent_app_number] => 7/797054 [patent_app_country] => US [patent_app_date] => 1991-11-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 3 [patent_no_of_words] => 3155 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 241 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/243/05243211.pdf [firstpage_image] =>[orig_patent_app_number] => 797054 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/797054
Power FET with shielded channels Nov 24, 1991 Issued
Array ( [id] => 3089884 [patent_doc_number] => 05285069 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-02-08 [patent_title] => 'Array of field effect transistors of different threshold voltages in same semiconductor integrated circuit' [patent_app_type] => 1 [patent_app_number] => 7/795834 [patent_app_country] => US [patent_app_date] => 1991-11-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 33 [patent_no_of_words] => 9986 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 132 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/285/05285069.pdf [firstpage_image] =>[orig_patent_app_number] => 795834 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/795834
Array of field effect transistors of different threshold voltages in same semiconductor integrated circuit Nov 20, 1991 Issued
Array ( [id] => 3118027 [patent_doc_number] => 05396099 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-03-07 [patent_title] => 'MOS type semiconductor device having a high ON current/OFF current ratio' [patent_app_type] => 1 [patent_app_number] => 7/795736 [patent_app_country] => US [patent_app_date] => 1991-11-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 11 [patent_no_of_words] => 2470 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/396/05396099.pdf [firstpage_image] =>[orig_patent_app_number] => 795736 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/795736
MOS type semiconductor device having a high ON current/OFF current ratio Nov 20, 1991 Issued
Array ( [id] => 3102074 [patent_doc_number] => 05291274 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-03-01 [patent_title] => 'Electron device having a current channel of dielectric material' [patent_app_type] => 1 [patent_app_number] => 7/779004 [patent_app_country] => US [patent_app_date] => 1991-11-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 36 [patent_figures_cnt] => 91 [patent_no_of_words] => 17513 [patent_no_of_claims] => 40 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 166 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/291/05291274.pdf [firstpage_image] =>[orig_patent_app_number] => 779004 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/779004
Electron device having a current channel of dielectric material Nov 19, 1991 Issued
Array ( [id] => 2898829 [patent_doc_number] => 05272371 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-12-21 [patent_title] => 'Electrostatic discharge protection structure' [patent_app_type] => 1 [patent_app_number] => 7/794488 [patent_app_country] => US [patent_app_date] => 1991-11-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 7 [patent_no_of_words] => 6767 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 218 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/272/05272371.pdf [firstpage_image] =>[orig_patent_app_number] => 794488 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/794488
Electrostatic discharge protection structure Nov 18, 1991 Issued
Array ( [id] => 2901510 [patent_doc_number] => 05177569 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-01-05 [patent_title] => 'Semiconductor device having a two layered structure gate electrode' [patent_app_type] => 1 [patent_app_number] => 7/789722 [patent_app_country] => US [patent_app_date] => 1991-11-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 18 [patent_no_of_words] => 4252 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/177/05177569.pdf [firstpage_image] =>[orig_patent_app_number] => 789722 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/789722
Semiconductor device having a two layered structure gate electrode Nov 7, 1991 Issued
Array ( [id] => 3624262 [patent_doc_number] => 05614730 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-03-25 [patent_title] => 'Active matrix substrate' [patent_app_type] => 1 [patent_app_number] => 7/790253 [patent_app_country] => US [patent_app_date] => 1991-11-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 32 [patent_figures_cnt] => 54 [patent_no_of_words] => 11539 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 183 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/614/05614730.pdf [firstpage_image] =>[orig_patent_app_number] => 790253 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/790253
Active matrix substrate Nov 7, 1991 Issued
07/789711 SEMICONDUCTOR DEVICE HAVING A GATE ELECTRODE OF POLYCRYSTAL LAYER AND A METHOD OF MANUFACTURING THEREOF Nov 7, 1991 Abandoned
Array ( [id] => 2898616 [patent_doc_number] => 05272361 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-12-21 [patent_title] => 'Field effect semiconductor device with immunity to hot carrier effects' [patent_app_type] => 1 [patent_app_number] => 7/785201 [patent_app_country] => US [patent_app_date] => 1991-11-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 22 [patent_no_of_words] => 5504 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/272/05272361.pdf [firstpage_image] =>[orig_patent_app_number] => 785201 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/785201
Field effect semiconductor device with immunity to hot carrier effects Oct 31, 1991 Issued
07/783674 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME Oct 28, 1991 Abandoned
07/784256 MIS TRANSISTOR Oct 28, 1991 Abandoned
Array ( [id] => 2827844 [patent_doc_number] => 05168329 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-12-01 [patent_title] => 'Microwave semiconductor device capable of controlling a threshold voltage' [patent_app_type] => 1 [patent_app_number] => 7/785213 [patent_app_country] => US [patent_app_date] => 1991-10-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 1649 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 233 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/168/05168329.pdf [firstpage_image] =>[orig_patent_app_number] => 785213 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/785213
Microwave semiconductor device capable of controlling a threshold voltage Oct 27, 1991 Issued
Array ( [id] => 3097825 [patent_doc_number] => 05291050 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-03-01 [patent_title] => 'MOS device having reduced gate-to-drain capacitance' [patent_app_type] => 1 [patent_app_number] => 7/780222 [patent_app_country] => US [patent_app_date] => 1991-10-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 13 [patent_no_of_words] => 2076 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 39 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/291/05291050.pdf [firstpage_image] =>[orig_patent_app_number] => 780222 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/780222
MOS device having reduced gate-to-drain capacitance Oct 21, 1991 Issued
Array ( [id] => 2899216 [patent_doc_number] => 05241190 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-08-31 [patent_title] => 'Apparatus for contacting closely spaced quantum wells and resulting devices' [patent_app_type] => 1 [patent_app_number] => 7/779429 [patent_app_country] => US [patent_app_date] => 1991-10-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 8 [patent_no_of_words] => 2707 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 184 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/241/05241190.pdf [firstpage_image] =>[orig_patent_app_number] => 779429 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/779429
Apparatus for contacting closely spaced quantum wells and resulting devices Oct 16, 1991 Issued
07/778426 VERTICAL FET DEVICE WITH LOW GATE TO SOURCE OVERLAP CAPACITANCE Oct 15, 1991 Abandoned
07/776102 PERFORMANCE LATERAL DOUBLE-DIFFUSED MOS TRANSISTOR AND METHOD OF FABRICATION Oct 14, 1991 Abandoned
Array ( [id] => 3069971 [patent_doc_number] => 05294821 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-03-15 [patent_title] => 'Thin-film SOI semiconductor device having heavily doped diffusion regions beneath the channels of transistors' [patent_app_type] => 1 [patent_app_number] => 7/773162 [patent_app_country] => US [patent_app_date] => 1991-10-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 7 [patent_no_of_words] => 3664 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 65 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/294/05294821.pdf [firstpage_image] =>[orig_patent_app_number] => 773162 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/773162
Thin-film SOI semiconductor device having heavily doped diffusion regions beneath the channels of transistors Oct 7, 1991 Issued
07/770872 MOS TYPE SEMICONDUCTOR DEVICE HAVING THE LDD STRUCTURE Oct 3, 1991 Abandoned
Array ( [id] => 3017274 [patent_doc_number] => 05309007 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-05-03 [patent_title] => 'Junction field effect transistor with lateral gate voltage swing (GVS-JFET)' [patent_app_type] => 1 [patent_app_number] => 7/767952 [patent_app_country] => US [patent_app_date] => 1991-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 7 [patent_no_of_words] => 2295 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 155 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/309/05309007.pdf [firstpage_image] =>[orig_patent_app_number] => 767952 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/767952
Junction field effect transistor with lateral gate voltage swing (GVS-JFET) Sep 29, 1991 Issued
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