
Devon C. Kramer
Supervisory Patent Examiner (ID: 1983, Phone: (571)272-7118 , Office: P/3746 )
| Most Active Art Unit | 3683 |
| Art Unit(s) | 3683, 3741, 3613, 3746 |
| Total Applications | 1035 |
| Issued Applications | 672 |
| Pending Applications | 81 |
| Abandoned Applications | 283 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 2855439
[patent_doc_number] => 05111255
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1992-05-05
[patent_title] => 'Buried channel heterojunction field effect transistor'
[patent_app_type] => 1
[patent_app_number] => 7/533636
[patent_app_country] => US
[patent_app_date] => 1990-06-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 5
[patent_no_of_words] => 3231
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 25
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/111/05111255.pdf
[firstpage_image] =>[orig_patent_app_number] => 533636
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/533636 | Buried channel heterojunction field effect transistor | Jun 4, 1990 | Issued |
Array
(
[id] => 2781355
[patent_doc_number] => 05075760
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1991-12-24
[patent_title] => 'Semiconductor device package assembly employing flexible tape'
[patent_app_type] => 1
[patent_app_number] => 7/532134
[patent_app_country] => US
[patent_app_date] => 1990-05-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 11
[patent_no_of_words] => 2603
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 296
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/075/05075760.pdf
[firstpage_image] =>[orig_patent_app_number] => 532134
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/532134 | Semiconductor device package assembly employing flexible tape | May 30, 1990 | Issued |
Array
(
[id] => 2967657
[patent_doc_number] => 05264724
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1993-11-23
[patent_title] => 'Silicon nitride for application as the gate dielectric in MOS devices'
[patent_app_type] => 1
[patent_app_number] => 7/529477
[patent_app_country] => US
[patent_app_date] => 1990-05-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 26
[patent_figures_cnt] => 26
[patent_no_of_words] => 6033
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 104
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/264/05264724.pdf
[firstpage_image] =>[orig_patent_app_number] => 529477
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/529477 | Silicon nitride for application as the gate dielectric in MOS devices | May 28, 1990 | Issued |
Array
(
[id] => 2741091
[patent_doc_number] => 05051805
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1991-09-24
[patent_title] => 'Sub-micron bipolar devices with sub-micron contacts'
[patent_app_type] => 1
[patent_app_number] => 7/529020
[patent_app_country] => US
[patent_app_date] => 1990-05-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 20
[patent_figures_cnt] => 81
[patent_no_of_words] => 6516
[patent_no_of_claims] => 3
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 215
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/051/05051805.pdf
[firstpage_image] =>[orig_patent_app_number] => 529020
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/529020 | Sub-micron bipolar devices with sub-micron contacts | May 24, 1990 | Issued |
| 07/528850 | COMPUND SEMICONDUCTOR MIS FET AND A PRODUCTION METHOD THEREOF | May 24, 1990 | Abandoned |
Array
(
[id] => 2740746
[patent_doc_number] => 05051787
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1991-09-24
[patent_title] => 'Superconductor storage device and memory using superconductor storage devices as memory cells'
[patent_app_type] => 1
[patent_app_number] => 7/525546
[patent_app_country] => US
[patent_app_date] => 1990-05-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 23
[patent_no_of_words] => 6759
[patent_no_of_claims] => 24
[patent_no_of_ind_claims] => 8
[patent_words_short_claim] => 90
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/051/05051787.pdf
[firstpage_image] =>[orig_patent_app_number] => 525546
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/525546 | Superconductor storage device and memory using superconductor storage devices as memory cells | May 17, 1990 | Issued |
| 07/518690 | INTEGRATED CMOS GATE-ARRAY CIRCUIT | May 2, 1990 | Abandoned |
Array
(
[id] => 2740339
[patent_doc_number] => 05040042
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1991-08-13
[patent_title] => 'Bidirectional semiconductor component that can be turned off'
[patent_app_type] => 1
[patent_app_number] => 7/514240
[patent_app_country] => US
[patent_app_date] => 1990-04-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 6
[patent_no_of_words] => 3272
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 28
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/040/05040042.pdf
[firstpage_image] =>[orig_patent_app_number] => 514240
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/514240 | Bidirectional semiconductor component that can be turned off | Apr 24, 1990 | Issued |
Array
(
[id] => 2810107
[patent_doc_number] => 05124770
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1992-06-23
[patent_title] => 'Field effect transistor with alpha particle protection'
[patent_app_type] => 1
[patent_app_number] => 7/512501
[patent_app_country] => US
[patent_app_date] => 1990-04-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 10
[patent_no_of_words] => 3786
[patent_no_of_claims] => 29
[patent_no_of_ind_claims] => 6
[patent_words_short_claim] => 139
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/124/05124770.pdf
[firstpage_image] =>[orig_patent_app_number] => 512501
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/512501 | Field effect transistor with alpha particle protection | Apr 19, 1990 | Issued |
Array
(
[id] => 2830150
[patent_doc_number] => 05095358
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1992-03-10
[patent_title] => 'Application of electronic properties of germanium to inhibit N-type or P-type diffusion in silicon'
[patent_app_type] => 1
[patent_app_number] => 7/510742
[patent_app_country] => US
[patent_app_date] => 1990-04-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 11
[patent_no_of_words] => 3221
[patent_no_of_claims] => 2
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 142
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/095/05095358.pdf
[firstpage_image] =>[orig_patent_app_number] => 510742
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/510742 | Application of electronic properties of germanium to inhibit N-type or P-type diffusion in silicon | Apr 17, 1990 | Issued |
Array
(
[id] => 2714693
[patent_doc_number] => 04982251
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1991-01-01
[patent_title] => 'Semiconductor element'
[patent_app_type] => 1
[patent_app_number] => 7/511952
[patent_app_country] => US
[patent_app_date] => 1990-04-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 12
[patent_no_of_words] => 6230
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 62
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/982/04982251.pdf
[firstpage_image] =>[orig_patent_app_number] => 511952
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/511952 | Semiconductor element | Apr 16, 1990 | Issued |
Array
(
[id] => 2715495
[patent_doc_number] => 05055899
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1991-10-08
[patent_title] => 'Thin film transistor'
[patent_app_type] => 1
[patent_app_number] => 7/503270
[patent_app_country] => US
[patent_app_date] => 1990-04-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 16
[patent_figures_cnt] => 45
[patent_no_of_words] => 7561
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 172
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/055/05055899.pdf
[firstpage_image] =>[orig_patent_app_number] => 503270
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/503270 | Thin film transistor | Apr 1, 1990 | Issued |
| 07/503350 | ELECTRICALLY-PROGRAMMABLE SEMICONDUCTOR MEMORIES | Mar 29, 1990 | Abandoned |
Array
(
[id] => 2810217
[patent_doc_number] => 05124776
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1992-06-23
[patent_title] => 'Bipolar integrated circuit having a unit block structure'
[patent_app_type] => 1
[patent_app_number] => 7/492898
[patent_app_country] => US
[patent_app_date] => 1990-03-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 19
[patent_figures_cnt] => 23
[patent_no_of_words] => 10784
[patent_no_of_claims] => 22
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 213
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/124/05124776.pdf
[firstpage_image] =>[orig_patent_app_number] => 492898
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/492898 | Bipolar integrated circuit having a unit block structure | Mar 12, 1990 | Issued |
Array
(
[id] => 2695476
[patent_doc_number] => 05049975
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1991-09-17
[patent_title] => 'Multi-layered interconnection structure for a semiconductor device'
[patent_app_type] => 1
[patent_app_number] => 7/492032
[patent_app_country] => US
[patent_app_date] => 1990-03-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 12
[patent_no_of_words] => 3375
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 108
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/049/05049975.pdf
[firstpage_image] =>[orig_patent_app_number] => 492032
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/492032 | Multi-layered interconnection structure for a semiconductor device | Mar 11, 1990 | Issued |
Array
(
[id] => 2755972
[patent_doc_number] => 05031008
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1991-07-09
[patent_title] => 'MOSFET transistor'
[patent_app_type] => 1
[patent_app_number] => 7/491470
[patent_app_country] => US
[patent_app_date] => 1990-03-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 13
[patent_no_of_words] => 3719
[patent_no_of_claims] => 2
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 243
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/031/05031008.pdf
[firstpage_image] =>[orig_patent_app_number] => 491470
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/491470 | MOSFET transistor | Mar 11, 1990 | Issued |
Array
(
[id] => 2834007
[patent_doc_number] => 05117269
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1992-05-26
[patent_title] => 'EPROM memory array with crosspoint configuration'
[patent_app_type] => 1
[patent_app_number] => 7/487480
[patent_app_country] => US
[patent_app_date] => 1990-03-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 12
[patent_no_of_words] => 2717
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 224
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/117/05117269.pdf
[firstpage_image] =>[orig_patent_app_number] => 487480
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/487480 | EPROM memory array with crosspoint configuration | Mar 1, 1990 | Issued |
Array
(
[id] => 2760411
[patent_doc_number] => 05072285
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1991-12-10
[patent_title] => 'Semiconductor integrated circuit having region for forming complementary field effect transistors and region for forming bipolar transistors'
[patent_app_type] => 1
[patent_app_number] => 7/482954
[patent_app_country] => US
[patent_app_date] => 1990-02-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 26
[patent_figures_cnt] => 43
[patent_no_of_words] => 10412
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 553
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/072/05072285.pdf
[firstpage_image] =>[orig_patent_app_number] => 482954
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/482954 | Semiconductor integrated circuit having region for forming complementary field effect transistors and region for forming bipolar transistors | Feb 21, 1990 | Issued |
Array
(
[id] => 2849911
[patent_doc_number] => 05161235
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1992-11-03
[patent_title] => 'Field-effect compound semiconductive transistor with GaAs gate to increase barrier height and reduce turn-on threshold'
[patent_app_type] => 1
[patent_app_number] => 7/483212
[patent_app_country] => US
[patent_app_date] => 1990-02-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 24
[patent_no_of_words] => 3544
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 6
[patent_words_short_claim] => 153
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/161/05161235.pdf
[firstpage_image] =>[orig_patent_app_number] => 483212
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/483212 | Field-effect compound semiconductive transistor with GaAs gate to increase barrier height and reduce turn-on threshold | Feb 19, 1990 | Issued |
Array
(
[id] => 2760224
[patent_doc_number] => 05072275
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1991-12-10
[patent_title] => 'Small contactless RAM cell'
[patent_app_type] => 1
[patent_app_number] => 7/484459
[patent_app_country] => US
[patent_app_date] => 1990-02-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 31
[patent_no_of_words] => 12130
[patent_no_of_claims] => 3
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 150
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/072/05072275.pdf
[firstpage_image] =>[orig_patent_app_number] => 484459
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/484459 | Small contactless RAM cell | Feb 14, 1990 | Issued |