Search

Devon C. Kramer

Supervisory Patent Examiner (ID: 1983, Phone: (571)272-7118 , Office: P/3746 )

Most Active Art Unit
3683
Art Unit(s)
3683, 3741, 3613, 3746
Total Applications
1035
Issued Applications
672
Pending Applications
81
Abandoned Applications
283

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 7030855 [patent_doc_number] => 20050029557 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-02-10 [patent_title] => 'High-breakdown-voltage semiconductor device' [patent_app_type] => utility [patent_app_number] => 10/942011 [patent_app_country] => US [patent_app_date] => 2004-09-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 14125 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0029/20050029557.pdf [firstpage_image] =>[orig_patent_app_number] => 10942011 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/942011
High-breakdown-voltage semiconductor device Sep 15, 2004 Issued
Array ( [id] => 6963935 [patent_doc_number] => 20050230832 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-10-20 [patent_title] => 'Three-level unitary interconnect structure' [patent_app_type] => utility [patent_app_number] => 10/925225 [patent_app_country] => US [patent_app_date] => 2004-08-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3387 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0230/20050230832.pdf [firstpage_image] =>[orig_patent_app_number] => 10925225 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/925225
Three-level unitary interconnect structure Aug 23, 2004 Abandoned
Array ( [id] => 7086552 [patent_doc_number] => 20050006664 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-01-13 [patent_title] => 'Semisonductor device' [patent_app_type] => utility [patent_app_number] => 10/909425 [patent_app_country] => US [patent_app_date] => 2004-08-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 6597 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0006/20050006664.pdf [firstpage_image] =>[orig_patent_app_number] => 10909425 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/909425
Semisonductor device Aug 2, 2004 Abandoned
Array ( [id] => 7132791 [patent_doc_number] => 20050179027 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-08-18 [patent_title] => 'Nitride based semiconductor light-emitting device' [patent_app_type] => utility [patent_app_number] => 10/890215 [patent_app_country] => US [patent_app_date] => 2004-07-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 4224 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0179/20050179027.pdf [firstpage_image] =>[orig_patent_app_number] => 10890215 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/890215
Nitride based semiconductor light-emitting device Jul 13, 2004 Abandoned
Array ( [id] => 963622 [patent_doc_number] => 06949434 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-09-27 [patent_title] => 'Method of manufacturing a vertical semiconductor device' [patent_app_type] => utility [patent_app_number] => 10/880048 [patent_app_country] => US [patent_app_date] => 2004-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 17 [patent_no_of_words] => 3675 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/949/06949434.pdf [firstpage_image] =>[orig_patent_app_number] => 10880048 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/880048
Method of manufacturing a vertical semiconductor device Jun 28, 2004 Issued
Array ( [id] => 7273061 [patent_doc_number] => 20040232512 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-11-25 [patent_title] => 'Semiconductor device and manufacturing method thereof' [patent_app_type] => new [patent_app_number] => 10/874363 [patent_app_country] => US [patent_app_date] => 2004-06-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 4686 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0232/20040232512.pdf [firstpage_image] =>[orig_patent_app_number] => 10874363 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/874363
Semiconductor device and manufacturing method thereof Jun 23, 2004 Abandoned
Array ( [id] => 703121 [patent_doc_number] => 07064410 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-06-20 [patent_title] => 'MOS antifuse with low post-program resistance' [patent_app_type] => utility [patent_app_number] => 10/872173 [patent_app_country] => US [patent_app_date] => 2004-06-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 14 [patent_no_of_words] => 4165 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/064/07064410.pdf [firstpage_image] =>[orig_patent_app_number] => 10872173 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/872173
MOS antifuse with low post-program resistance Jun 17, 2004 Issued
Array ( [id] => 7363110 [patent_doc_number] => 20040217417 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-11-04 [patent_title] => 'High voltage device and method for fabricating the same' [patent_app_type] => new [patent_app_number] => 10/855523 [patent_app_country] => US [patent_app_date] => 2004-05-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 2757 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 3 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0217/20040217417.pdf [firstpage_image] =>[orig_patent_app_number] => 10855523 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/855523
High voltage device and method for fabricating the same May 27, 2004 Abandoned
Array ( [id] => 7002333 [patent_doc_number] => 20050167646 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-08-04 [patent_title] => 'Nanosubstrate with conductive zone and method for its selective preparation' [patent_app_type] => utility [patent_app_number] => 10/854746 [patent_app_country] => US [patent_app_date] => 2004-05-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5604 [patent_no_of_claims] => 38 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0167/20050167646.pdf [firstpage_image] =>[orig_patent_app_number] => 10854746 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/854746
Nanosubstrate with conductive zone and method for its selective preparation May 26, 2004 Abandoned
Array ( [id] => 7411653 [patent_doc_number] => 20040207027 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-10-21 [patent_title] => 'Semiconductor switching device and method' [patent_app_type] => new [patent_app_number] => 10/840486 [patent_app_country] => US [patent_app_date] => 2004-05-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3404 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 3 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0207/20040207027.pdf [firstpage_image] =>[orig_patent_app_number] => 10840486 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/840486
Semiconductor bidirectional switching device May 5, 2004 Issued
Array ( [id] => 7067034 [patent_doc_number] => 20050242416 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-11-03 [patent_title] => 'LOW-CAPACITANCE BONDING PAD FOR SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 10/709366 [patent_app_country] => US [patent_app_date] => 2004-04-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2566 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0242/20050242416.pdf [firstpage_image] =>[orig_patent_app_number] => 10709366 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/709366
LOW-CAPACITANCE BONDING PAD FOR SEMICONDUCTOR DEVICE Apr 28, 2004 Abandoned
Array ( [id] => 690491 [patent_doc_number] => 07074686 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-07-11 [patent_title] => 'Method of creating high-quality relaxed SiGe-on-insulator for strained Si CMOS applications' [patent_app_type] => utility [patent_app_number] => 10/824289 [patent_app_country] => US [patent_app_date] => 2004-04-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 12 [patent_no_of_words] => 3976 [patent_no_of_claims] => 34 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/074/07074686.pdf [firstpage_image] =>[orig_patent_app_number] => 10824289 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/824289
Method of creating high-quality relaxed SiGe-on-insulator for strained Si CMOS applications Apr 13, 2004 Issued
Array ( [id] => 6952403 [patent_doc_number] => 20050227498 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-10-13 [patent_title] => 'Method for fabricating strained silicon-on-insulator structures and strained silicon-on insulator structures formed thereby' [patent_app_type] => utility [patent_app_number] => 10/814482 [patent_app_country] => US [patent_app_date] => 2004-03-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3863 [patent_no_of_claims] => 34 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0227/20050227498.pdf [firstpage_image] =>[orig_patent_app_number] => 10814482 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/814482
Method for fabricating strained silicon-on-insulator structures and strained silicon-on insulator structures formed thereby Mar 30, 2004 Issued
Array ( [id] => 7002497 [patent_doc_number] => 20050167810 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-08-04 [patent_title] => 'Stacked semiconductor device' [patent_app_type] => utility [patent_app_number] => 10/806166 [patent_app_country] => US [patent_app_date] => 2004-03-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 1104 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0167/20050167810.pdf [firstpage_image] =>[orig_patent_app_number] => 10806166 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/806166
Stacked semiconductor device Mar 22, 2004 Abandoned
Array ( [id] => 7314269 [patent_doc_number] => 20040222462 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-11-11 [patent_title] => 'Shallow doped junctions with a variable profile gradation of dopants' [patent_app_type] => new [patent_app_number] => 10/804578 [patent_app_country] => US [patent_app_date] => 2004-03-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3976 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 203 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0222/20040222462.pdf [firstpage_image] =>[orig_patent_app_number] => 10804578 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/804578
Method of forming shallow doped junctions having a variable profile gradation of dopants Mar 18, 2004 Issued
Array ( [id] => 7393191 [patent_doc_number] => 20040173793 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-09-09 [patent_title] => 'Resonant controlled qubit system' [patent_app_type] => new [patent_app_number] => 10/801336 [patent_app_country] => US [patent_app_date] => 2004-03-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 16903 [patent_no_of_claims] => 122 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 52 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0173/20040173793.pdf [firstpage_image] =>[orig_patent_app_number] => 10801336 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/801336
Resonant controlled qubit system Mar 14, 2004 Issued
Array ( [id] => 1009694 [patent_doc_number] => 06900456 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-05-31 [patent_title] => 'Resonant controlled qubit system' [patent_app_type] => utility [patent_app_number] => 10/801340 [patent_app_country] => US [patent_app_date] => 2004-03-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 10 [patent_no_of_words] => 16908 [patent_no_of_claims] => 46 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 135 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/900/06900456.pdf [firstpage_image] =>[orig_patent_app_number] => 10801340 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/801340
Resonant controlled qubit system Mar 14, 2004 Issued
Array ( [id] => 7615058 [patent_doc_number] => 06897468 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-05-24 [patent_title] => 'Resonant controlled qubit system' [patent_app_type] => utility [patent_app_number] => 10/801335 [patent_app_country] => US [patent_app_date] => 2004-03-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 10 [patent_no_of_words] => 16908 [patent_no_of_claims] => 33 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/897/06897468.pdf [firstpage_image] =>[orig_patent_app_number] => 10801335 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/801335
Resonant controlled qubit system Mar 14, 2004 Issued
Array ( [id] => 979315 [patent_doc_number] => 06930320 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-08-16 [patent_title] => 'Resonant controlled qubit system' [patent_app_type] => utility [patent_app_number] => 10/798737 [patent_app_country] => US [patent_app_date] => 2004-03-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 10 [patent_no_of_words] => 17160 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/930/06930320.pdf [firstpage_image] =>[orig_patent_app_number] => 10798737 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/798737
Resonant controlled qubit system Mar 9, 2004 Issued
Array ( [id] => 7273033 [patent_doc_number] => 20040232484 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-11-25 [patent_title] => 'Non-uniform power semiconductor and method for making' [patent_app_type] => new [patent_app_number] => 10/790983 [patent_app_country] => US [patent_app_date] => 2004-03-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5421 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 78 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0232/20040232484.pdf [firstpage_image] =>[orig_patent_app_number] => 10790983 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/790983
Non-uniform power semiconductor and method for making non-uniform power semiconductor Feb 29, 2004 Issued
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