Devon C. Kramer

Array ( [id] => 7094719 [patent_doc_number] => 20050127390 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-06-16 [patent_title] => 'LED package' [patent_app_type] => utility [patent_app_number] => 10/760396 [patent_app_country] => US [patent_app_date] => 2004-01-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 3007 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0127/20050127390.pdf [firstpage_image] =>[orig_patent_app_number] => 10760396 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 627345 [patent_doc_number] => 07135730 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-11-14 [patent_title] => 'Bias-independent capacitor based on superposition of nonlinear capacitors for analog/RF circuit applications' [patent_app_type] => utility [patent_app_number] => 10/759076 [patent_app_country] => US [patent_app_date] => 2004-01-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 11 [patent_no_of_words] => 1931 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 224 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/135/07135730.pdf [firstpage_image] =>[orig_patent_app_number] => 10759076 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1113741 [patent_doc_number] => 06803627 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-10-12 [patent_title] => 'Reverse-blocking power semiconductor component having a region short-circuited to a drain-side part of a body zone' [patent_app_type] => B2 [patent_app_number] => 10/757826 [patent_app_country] => US [patent_app_date] => 2004-01-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 41 [patent_no_of_words] => 9551 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/803/06803627.pdf [firstpage_image] =>[orig_patent_app_number] => 10757826 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7441074 [patent_doc_number] => 20040195569 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-10-07 [patent_title] => 'Device manufacturing method and device, electro-optic device, and electronic equipment' [patent_app_type] => new [patent_app_number] => 10/756416 [patent_app_country] => US [patent_app_date] => 2004-01-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 15062 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 78 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0195/20040195569.pdf [firstpage_image] =>[orig_patent_app_number] => 10756416 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 641732 [patent_doc_number] => 07122431 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-10-17 [patent_title] => 'Methods of fabrication metal oxide semiconductor (MOS) transistors having buffer regions below source and drain regions' [patent_app_type] => utility [patent_app_number] => 10/754676 [patent_app_country] => US [patent_app_date] => 2004-01-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 33 [patent_figures_cnt] => 81 [patent_no_of_words] => 9002 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/122/07122431.pdf [firstpage_image] =>[orig_patent_app_number] => 10754676 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6981112 [patent_doc_number] => 20050151180 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-07-14 [patent_title] => 'Method to reduce a capacitor depletion phenomena' [patent_app_type] => utility [patent_app_number] => 10/754835 [patent_app_country] => US [patent_app_date] => 2004-01-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3290 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0151/20050151180.pdf [firstpage_image] =>[orig_patent_app_number] => 10754835 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 668828 [patent_doc_number] => 07095072 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-08-22 [patent_title] => 'Semiconductor device with wiring layers forming a capacitor' [patent_app_type] => utility [patent_app_number] => 10/753325 [patent_app_country] => US [patent_app_date] => 2004-01-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 5570 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 178 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/095/07095072.pdf [firstpage_image] =>[orig_patent_app_number] => 10753325 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 696239 [patent_doc_number] => 07071505 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-07-04 [patent_title] => 'Method and apparatus for reducing imager floating diffusion leakage' [patent_app_type] => utility [patent_app_number] => 10/752555 [patent_app_country] => US [patent_app_date] => 2004-01-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 20 [patent_no_of_words] => 4073 [patent_no_of_claims] => 76 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 69 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/071/07071505.pdf [firstpage_image] =>[orig_patent_app_number] => 10752555 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7324208 [patent_doc_number] => 20040137688 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-07-15 [patent_title] => 'Semiconductor device with tapered gate and process for fabricating the device' [patent_app_type] => new [patent_app_number] => 10/744374 [patent_app_country] => US [patent_app_date] => 2003-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 4219 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 58 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0137/20040137688.pdf [firstpage_image] =>[orig_patent_app_number] => 10744374 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7295768 [patent_doc_number] => 20040124413 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-07-01 [patent_title] => 'Wafer support plate' [patent_app_type] => new [patent_app_number] => 10/736685 [patent_app_country] => US [patent_app_date] => 2003-12-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2717 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 31 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0124/20040124413.pdf [firstpage_image] =>[orig_patent_app_number] => 10736685 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7260272 [patent_doc_number] => 20040150075 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-08-05 [patent_title] => 'Semiconductor device with cupper wiring and method for manufacturing semiconductor device' [patent_app_type] => new [patent_app_number] => 10/735815 [patent_app_country] => US [patent_app_date] => 2003-12-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2673 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 62 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0150/20040150075.pdf [firstpage_image] =>[orig_patent_app_number] => 10735815 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7154333 [patent_doc_number] => 20050082577 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-04-21 [patent_title] => 'Semiconductor device using insulating film of low dielectric constant as interlayer insulating film' [patent_app_type] => utility [patent_app_number] => 10/734106 [patent_app_country] => US [patent_app_date] => 2003-12-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 4213 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0082/20050082577.pdf [firstpage_image] =>[orig_patent_app_number] => 10734106 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7283580 [patent_doc_number] => 20040144971 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-07-29 [patent_title] => 'Optoelectronic component with a pulse generating device' [patent_app_type] => new [patent_app_number] => 10/735465 [patent_app_country] => US [patent_app_date] => 2003-12-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4859 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 57 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0144/20040144971.pdf [firstpage_image] =>[orig_patent_app_number] => 10735465 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7375526 [patent_doc_number] => 20040178474 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-09-16 [patent_title] => 'Lateral-current-flow bipolar transistor with high emitter perimeter/area ratio' [patent_app_type] => new [patent_app_number] => 10/735286 [patent_app_country] => US [patent_app_date] => 2003-12-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2141 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 62 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0178/20040178474.pdf [firstpage_image] =>[orig_patent_app_number] => 10735286 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 658085 [patent_doc_number] => 07105385 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-09-12 [patent_title] => 'FPGA blocks with adjustable porosity pass thru' [patent_app_type] => utility [patent_app_number] => 10/731296 [patent_app_country] => US [patent_app_date] => 2003-12-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 3683 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/105/07105385.pdf [firstpage_image] =>[orig_patent_app_number] => 10731296 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7286318 [patent_doc_number] => 20040108502 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-06-10 [patent_title] => 'Solid-state image pickup apparatus' [patent_app_type] => new [patent_app_number] => 10/727515 [patent_app_country] => US [patent_app_date] => 2003-12-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 14193 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0108/20040108502.pdf [firstpage_image] =>[orig_patent_app_number] => 10727515 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7289719 [patent_doc_number] => 20040110333 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-06-10 [patent_title] => 'High voltage power MOSFET having a voltage sustaining region that includes doped columns formed by trench etching and ion implantation' [patent_app_type] => new [patent_app_number] => 10/724849 [patent_app_country] => US [patent_app_date] => 2003-12-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3468 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0110/20040110333.pdf [firstpage_image] =>[orig_patent_app_number] => 10724849 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7301226 [patent_doc_number] => 20040113203 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-06-17 [patent_title] => 'Trench MOSFET device with improved on-resistance' [patent_app_type] => new [patent_app_number] => 10/725325 [patent_app_country] => US [patent_app_date] => 2003-12-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3667 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 180 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0113/20040113203.pdf [firstpage_image] =>[orig_patent_app_number] => 10725325 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7447532 [patent_doc_number] => 20040164298 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-08-26 [patent_title] => 'Semiconductor structure, semiconductor device, and method and apparatus for manufacturing the same' [patent_app_type] => new [patent_app_number] => 10/722486 [patent_app_country] => US [patent_app_date] => 2003-11-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 12714 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 54 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0164/20040164298.pdf [firstpage_image] =>[orig_patent_app_number] => 10722486 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1012636 [patent_doc_number] => 06897107 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-05-24 [patent_title] => 'Method for forming TTO nitride liner for improved collar protection and TTO reliability' [patent_app_type] => utility [patent_app_number] => 10/720490 [patent_app_country] => US [patent_app_date] => 2003-11-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 16 [patent_no_of_words] => 3609 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 255 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/897/06897107.pdf [firstpage_image] =>[orig_patent_app_number] => 10720490 [rel_patent_id] =>[rel_patent_doc_number] =>)