Search

Devon C. Kramer

Supervisory Patent Examiner (ID: 1983, Phone: (571)272-7118 , Office: P/3746 )

Most Active Art Unit
3683
Art Unit(s)
3683, 3741, 3613, 3746
Total Applications
1035
Issued Applications
672
Pending Applications
81
Abandoned Applications
283

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 1090123 [patent_doc_number] => 06828645 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-12-07 [patent_title] => 'Voltage withstanding structure for a semiconductor device' [patent_app_type] => B2 [patent_app_number] => 10/460135 [patent_app_country] => US [patent_app_date] => 2003-06-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 17 [patent_no_of_words] => 7721 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/828/06828645.pdf [firstpage_image] =>[orig_patent_app_number] => 10460135 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/460135
Voltage withstanding structure for a semiconductor device Jun 11, 2003 Issued
Array ( [id] => 7278817 [patent_doc_number] => 20040061194 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-04-01 [patent_title] => 'Gallium nitride compound semiconductor device having schottky contact' [patent_app_type] => new [patent_app_number] => 10/453045 [patent_app_country] => US [patent_app_date] => 2003-06-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 4605 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 29 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0061/20040061194.pdf [firstpage_image] =>[orig_patent_app_number] => 10453045 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/453045
Gallium nitride compound semiconductor device having schottky contact Jun 2, 2003 Issued
Array ( [id] => 7427657 [patent_doc_number] => 20040007766 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-01-15 [patent_title] => 'Semiconductor device and method for manufacturing the same' [patent_app_type] => new [patent_app_number] => 10/445952 [patent_app_country] => US [patent_app_date] => 2003-05-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 30 [patent_figures_cnt] => 30 [patent_no_of_words] => 14849 [patent_no_of_claims] => 51 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0007/20040007766.pdf [firstpage_image] =>[orig_patent_app_number] => 10445952 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/445952
Semiconductor device and method for manufacturing the same May 27, 2003 Issued
Array ( [id] => 1062772 [patent_doc_number] => 06849516 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-02-01 [patent_title] => 'Methods of forming drain/source extension structures of a field effect transistor using a doped high-k dielectric layer' [patent_app_type] => utility [patent_app_number] => 10/442745 [patent_app_country] => US [patent_app_date] => 2003-05-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 9 [patent_no_of_words] => 5304 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/849/06849516.pdf [firstpage_image] =>[orig_patent_app_number] => 10442745 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/442745
Methods of forming drain/source extension structures of a field effect transistor using a doped high-k dielectric layer May 20, 2003 Issued
Array ( [id] => 6611461 [patent_doc_number] => 20030209761 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-11-13 [patent_title] => 'Semiconductor device and manufacturing method thereof' [patent_app_type] => new [patent_app_number] => 10/436181 [patent_app_country] => US [patent_app_date] => 2003-05-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 35 [patent_figures_cnt] => 35 [patent_no_of_words] => 11951 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0209/20030209761.pdf [firstpage_image] =>[orig_patent_app_number] => 10436181 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/436181
Semiconductor device and manufacturing method thereof May 12, 2003 Issued
Array ( [id] => 7189701 [patent_doc_number] => 20040084727 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-05-06 [patent_title] => 'Semiconductor device and learning method thereof' [patent_app_type] => new [patent_app_number] => 10/434358 [patent_app_country] => US [patent_app_date] => 2003-05-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 15964 [patent_no_of_claims] => 42 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 162 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0084/20040084727.pdf [firstpage_image] =>[orig_patent_app_number] => 10434358 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/434358
Semiconductor device and learning method thereof May 8, 2003 Issued
Array ( [id] => 1081313 [patent_doc_number] => 06835972 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-12-28 [patent_title] => 'Bowtie and T-shaped structures of L-shaped mesh implementation' [patent_app_type] => B2 [patent_app_number] => 10/434715 [patent_app_country] => US [patent_app_date] => 2003-05-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 1738 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 39 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/835/06835972.pdf [firstpage_image] =>[orig_patent_app_number] => 10434715 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/434715
Bowtie and T-shaped structures of L-shaped mesh implementation May 8, 2003 Issued
Array ( [id] => 7314312 [patent_doc_number] => 20040222488 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-11-11 [patent_title] => 'HIGH VOLTAGE N-LDMOS TRANSISTORS HAVING SHALLOW TRENCH ISOLATION REGION' [patent_app_type] => new [patent_app_number] => 10/249766 [patent_app_country] => US [patent_app_date] => 2003-05-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3291 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 3 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0222/20040222488.pdf [firstpage_image] =>[orig_patent_app_number] => 10249766 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/249766
High voltage N-LDMOS transistors having shallow trench isolation region May 5, 2003 Issued
Array ( [id] => 982310 [patent_doc_number] => 06927154 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-08-09 [patent_title] => 'Method for fabricating a transistor with a gate structure' [patent_app_type] => utility [patent_app_number] => 10/431425 [patent_app_country] => US [patent_app_date] => 2003-05-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 3180 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/927/06927154.pdf [firstpage_image] =>[orig_patent_app_number] => 10431425 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/431425
Method for fabricating a transistor with a gate structure May 5, 2003 Issued
Array ( [id] => 6723145 [patent_doc_number] => 20030205457 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-11-06 [patent_title] => 'Semiconductor carbon nanotubes fabricated by hydrogen functionalization and method for fabricating the same' [patent_app_type] => new [patent_app_number] => 10/428835 [patent_app_country] => US [patent_app_date] => 2003-05-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 5749 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 12 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0205/20030205457.pdf [firstpage_image] =>[orig_patent_app_number] => 10428835 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/428835
Semiconductor carbon nanotubes fabricated by hydrogen functionalization and method for fabricating the same May 4, 2003 Abandoned
Array ( [id] => 1043650 [patent_doc_number] => 06867083 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-03-15 [patent_title] => 'Method of forming a body contact of a transistor and structure therefor' [patent_app_type] => utility [patent_app_number] => 10/426515 [patent_app_country] => US [patent_app_date] => 2003-05-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 4765 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/867/06867083.pdf [firstpage_image] =>[orig_patent_app_number] => 10426515 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/426515
Method of forming a body contact of a transistor and structure therefor Apr 30, 2003 Issued
Array ( [id] => 1009692 [patent_doc_number] => 06900454 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-05-31 [patent_title] => 'Resonant controlled qubit system' [patent_app_type] => utility [patent_app_number] => 10/419024 [patent_app_country] => US [patent_app_date] => 2003-04-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 10 [patent_no_of_words] => 17164 [patent_no_of_claims] => 31 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 52 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/900/06900454.pdf [firstpage_image] =>[orig_patent_app_number] => 10419024 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/419024
Resonant controlled qubit system Apr 16, 2003 Issued
Array ( [id] => 6768025 [patent_doc_number] => 20030213965 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-11-20 [patent_title] => 'Luminescent diode chip that is flip-chip mounted on a carrier, and method for production thereof' [patent_app_type] => new [patent_app_number] => 10/401825 [patent_app_country] => US [patent_app_date] => 2003-03-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3910 [patent_no_of_claims] => 36 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0213/20030213965.pdf [firstpage_image] =>[orig_patent_app_number] => 10401825 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/401825
Luminescent diode chip that is flip-chip mounted on a carrier, and method for production thereof Mar 27, 2003 Issued
Array ( [id] => 996870 [patent_doc_number] => 06914312 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-07-05 [patent_title] => 'Field effect transistor having a MIS structure and method of fabricating the same' [patent_app_type] => utility [patent_app_number] => 10/396416 [patent_app_country] => US [patent_app_date] => 2003-03-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 9247 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/914/06914312.pdf [firstpage_image] =>[orig_patent_app_number] => 10396416 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/396416
Field effect transistor having a MIS structure and method of fabricating the same Mar 25, 2003 Issued
Array ( [id] => 6727710 [patent_doc_number] => 20030183900 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-10-02 [patent_title] => 'High-voltage diode and method for fabricating the high-voltage diode' [patent_app_type] => new [patent_app_number] => 10/395425 [patent_app_country] => US [patent_app_date] => 2003-03-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 5127 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 185 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0183/20030183900.pdf [firstpage_image] =>[orig_patent_app_number] => 10395425 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/395425
High-voltage diode Mar 23, 2003 Issued
Array ( [id] => 1056808 [patent_doc_number] => 06855970 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-02-15 [patent_title] => 'High-breakdown-voltage semiconductor device' [patent_app_type] => utility [patent_app_number] => 10/393914 [patent_app_country] => US [patent_app_date] => 2003-03-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 30 [patent_no_of_words] => 14122 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 321 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/855/06855970.pdf [firstpage_image] =>[orig_patent_app_number] => 10393914 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/393914
High-breakdown-voltage semiconductor device Mar 23, 2003 Issued
Array ( [id] => 6738213 [patent_doc_number] => 20030155581 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-08-21 [patent_title] => 'Controllable semiconductor component' [patent_app_type] => new [patent_app_number] => 10/393165 [patent_app_country] => US [patent_app_date] => 2003-03-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4486 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0155/20030155581.pdf [firstpage_image] =>[orig_patent_app_number] => 10393165 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/393165
Controllable semiconductor component with multi-section control electrode Mar 19, 2003 Issued
Array ( [id] => 710618 [patent_doc_number] => 07056761 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2006-06-06 [patent_title] => 'Avalanche diode with breakdown voltage controlled by gate length' [patent_app_type] => utility [patent_app_number] => 10/388815 [patent_app_country] => US [patent_app_date] => 2003-03-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 5 [patent_no_of_words] => 2081 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 77 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/056/07056761.pdf [firstpage_image] =>[orig_patent_app_number] => 10388815 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/388815
Avalanche diode with breakdown voltage controlled by gate length Mar 13, 2003 Issued
Array ( [id] => 7448294 [patent_doc_number] => 20040164379 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-08-26 [patent_title] => 'Ion implantation with multiple concentration levels' [patent_app_type] => new [patent_app_number] => 10/374305 [patent_app_country] => US [patent_app_date] => 2003-02-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2916 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0164/20040164379.pdf [firstpage_image] =>[orig_patent_app_number] => 10374305 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/374305
Ion implantation with multiple concentration levels Feb 24, 2003 Issued
Array ( [id] => 1119734 [patent_doc_number] => 06797580 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-09-28 [patent_title] => 'Method for fabricating a bipolar transistor in a BiCMOS process and related structure' [patent_app_type] => B1 [patent_app_number] => 10/371706 [patent_app_country] => US [patent_app_date] => 2003-02-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 11 [patent_no_of_words] => 3850 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 143 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/797/06797580.pdf [firstpage_image] =>[orig_patent_app_number] => 10371706 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/371706
Method for fabricating a bipolar transistor in a BiCMOS process and related structure Feb 20, 2003 Issued
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