
Dhaval V. Patel
Examiner (ID: 4462, Phone: (571)270-1818 , Office: P/2631 )
| Most Active Art Unit | 2631 |
| Art Unit(s) | 2611, 2631 |
| Total Applications | 1587 |
| Issued Applications | 1334 |
| Pending Applications | 84 |
| Abandoned Applications | 204 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 6839932
[patent_doc_number] => 20030037272
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2003-02-20
[patent_title] => 'Bus system and method for achieving a stable bus redundancy'
[patent_app_type] => new
[patent_app_number] => 09/735515
[patent_app_country] => US
[patent_app_date] => 2000-12-14
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[pdf_file] => publications/A1/0037/20030037272.pdf
[firstpage_image] =>[orig_patent_app_number] => 09735515
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Array
(
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[patent_doc_number] => 06691194
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[patent_kind] => B1
[patent_issue_date] => 2004-02-10
[patent_title] => 'Selective association of lock override procedures with queued multimodal lock'
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Array
(
[id] => 1178913
[patent_doc_number] => 06757777
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[patent_issue_date] => 2004-06-29
[patent_title] => 'Bus master switching unit'
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[patent_app_number] => 09/647704
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Array
(
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[patent_doc_number] => 06892262
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[patent_kind] => B1
[patent_issue_date] => 2005-05-10
[patent_title] => 'Serial bus interface device'
[patent_app_type] => utility
[patent_app_number] => 09/714304
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Array
(
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[patent_doc_number] => 06701401
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[patent_kind] => B1
[patent_issue_date] => 2004-03-02
[patent_title] => 'Method for testing a USB port and the device for the same'
[patent_app_type] => B1
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/706840 | Method for testing a USB port and the device for the same | Nov 6, 2000 | Issued |
Array
(
[id] => 1243087
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[patent_issue_date] => 2004-01-27
[patent_title] => 'High-speed block transfer circuit'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/704719 | High-speed block transfer circuit | Nov 2, 2000 | Issued |
Array
(
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[patent_doc_number] => 06691193
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[patent_title] => 'Efficient bus utilization in a multiprocessor system by dynamically mapping memory addresses'
[patent_app_type] => B1
[patent_app_number] => 09/691391
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/691391 | Efficient bus utilization in a multiprocessor system by dynamically mapping memory addresses | Oct 17, 2000 | Issued |
Array
(
[id] => 7630014
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[patent_issue_date] => 2003-10-21
[patent_title] => 'Bus interface circuit preparation apparatus and recording medium'
[patent_app_type] => B1
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[patent_app_country] => US
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/686928 | Bus interface circuit preparation apparatus and recording medium | Oct 10, 2000 | Issued |
Array
(
[id] => 7633107
[patent_doc_number] => 06658513
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[patent_kind] => B1
[patent_issue_date] => 2003-12-02
[patent_title] => 'Managing locks affected by planned or unplanned reconfiguration of locking facilities'
[patent_app_type] => B1
[patent_app_number] => 09/685623
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/685623 | Managing locks affected by planned or unplanned reconfiguration of locking facilities | Oct 9, 2000 | Issued |
Array
(
[id] => 1288904
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[patent_issue_date] => 2003-11-11
[patent_title] => 'Multiprocessor computer systems with command FIFO buffer at each target device'
[patent_app_type] => B1
[patent_app_number] => 09/680652
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[patent_app_date] => 2000-10-06
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Array
(
[id] => 1296985
[patent_doc_number] => 06633938
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[patent_title] => 'Independent reset of arbiters and agents to allow for delayed agent reset'
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Array
(
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Array
(
[id] => 1007675
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[patent_title] => 'Disk module of solid state'
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Array
(
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[patent_title] => 'Multi-tier point-to-point ring memory interface'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/678638 | Multi-tier point-to-point ring memory interface | Oct 2, 2000 | Issued |
Array
(
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Array
(
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Array
(
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Array
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Array
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Array
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