Search

Dhaval V. Patel

Examiner (ID: 4462, Phone: (571)270-1818 , Office: P/2631 )

Most Active Art Unit
2631
Art Unit(s)
2611, 2631
Total Applications
1587
Issued Applications
1334
Pending Applications
84
Abandoned Applications
204

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 1471891 [patent_doc_number] => 06460107 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-10-01 [patent_title] => 'Integrated real-time performance monitoring facility' [patent_app_type] => B1 [patent_app_number] => 09/301870 [patent_app_country] => US [patent_app_date] => 1999-04-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 5022 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 172 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/460/06460107.pdf [firstpage_image] =>[orig_patent_app_number] => 09301870 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/301870
Integrated real-time performance monitoring facility Apr 28, 1999 Issued
Array ( [id] => 1584660 [patent_doc_number] => 06449670 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-09-10 [patent_title] => 'Microcomputer with bit packets for interrupts, control and memory access' [patent_app_type] => B1 [patent_app_number] => 09/301495 [patent_app_country] => US [patent_app_date] => 1999-04-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 27 [patent_no_of_words] => 11831 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 132 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/449/06449670.pdf [firstpage_image] =>[orig_patent_app_number] => 09301495 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/301495
Microcomputer with bit packets for interrupts, control and memory access Apr 27, 1999 Issued
Array ( [id] => 1178762 [patent_doc_number] => 06757759 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-06-29 [patent_title] => 'Microcomputer chips with interconnected address and data paths' [patent_app_type] => B1 [patent_app_number] => 09/301487 [patent_app_country] => US [patent_app_date] => 1999-04-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 27 [patent_no_of_words] => 11994 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/757/06757759.pdf [firstpage_image] =>[orig_patent_app_number] => 09301487 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/301487
Microcomputer chips with interconnected address and data paths Apr 27, 1999 Issued
Array ( [id] => 1311097 [patent_doc_number] => 06625679 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-09-23 [patent_title] => 'Apparatus and method for converting interrupt transactions to interrupt signals to distribute interrupts to IA-32 processors' [patent_app_type] => B1 [patent_app_number] => 09/294927 [patent_app_country] => US [patent_app_date] => 1999-04-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 6408 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 78 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/625/06625679.pdf [firstpage_image] =>[orig_patent_app_number] => 09294927 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/294927
Apparatus and method for converting interrupt transactions to interrupt signals to distribute interrupts to IA-32 processors Apr 18, 1999 Issued
Array ( [id] => 7645912 [patent_doc_number] => 06477611 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-11-05 [patent_title] => 'Field-configurable, adaptable and programmable input/output bus interface and method' [patent_app_type] => B1 [patent_app_number] => 09/293253 [patent_app_country] => US [patent_app_date] => 1999-04-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 4537 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 13 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/477/06477611.pdf [firstpage_image] =>[orig_patent_app_number] => 09293253 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/293253
Field-configurable, adaptable and programmable input/output bus interface and method Apr 15, 1999 Issued
Array ( [id] => 1539095 [patent_doc_number] => 06412034 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-06-25 [patent_title] => 'Transaction-based locking approach' [patent_app_type] => B1 [patent_app_number] => 09/293360 [patent_app_country] => US [patent_app_date] => 1999-04-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 6286 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 135 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/412/06412034.pdf [firstpage_image] =>[orig_patent_app_number] => 09293360 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/293360
Transaction-based locking approach Apr 15, 1999 Issued
09/283334 SUSPENDING TO NONVOLATILE STORAGE Mar 30, 1999 Abandoned
Array ( [id] => 1456656 [patent_doc_number] => 06457082 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-09-24 [patent_title] => 'Break event generation during transitions between modes of operation in a computer system' [patent_app_type] => B1 [patent_app_number] => 09/281366 [patent_app_country] => US [patent_app_date] => 1999-03-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 9169 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/457/06457082.pdf [firstpage_image] =>[orig_patent_app_number] => 09281366 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/281366
Break event generation during transitions between modes of operation in a computer system Mar 29, 1999 Issued
Array ( [id] => 1584693 [patent_doc_number] => 06449676 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-09-10 [patent_title] => 'Hot-pluggable voltage regulator module' [patent_app_type] => B1 [patent_app_number] => 09/281081 [patent_app_country] => US [patent_app_date] => 1999-03-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 2 [patent_no_of_words] => 2347 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/449/06449676.pdf [firstpage_image] =>[orig_patent_app_number] => 09281081 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/281081
Hot-pluggable voltage regulator module Mar 29, 1999 Issued
Array ( [id] => 1311118 [patent_doc_number] => 06625681 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-09-23 [patent_title] => 'State activated one shot with extended pulse timing for hot-swap applications' [patent_app_type] => B1 [patent_app_number] => 09/272798 [patent_app_country] => US [patent_app_date] => 1999-03-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2399 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/625/06625681.pdf [firstpage_image] =>[orig_patent_app_number] => 09272798 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/272798
State activated one shot with extended pulse timing for hot-swap applications Mar 28, 1999 Issued
Array ( [id] => 1567381 [patent_doc_number] => 06363452 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-03-26 [patent_title] => 'Method and apparatus for adding and removing components without powering down computer system' [patent_app_type] => B1 [patent_app_number] => 09/280784 [patent_app_country] => US [patent_app_date] => 1999-03-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 6889 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/363/06363452.pdf [firstpage_image] =>[orig_patent_app_number] => 09280784 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/280784
Method and apparatus for adding and removing components without powering down computer system Mar 28, 1999 Issued
Array ( [id] => 1495202 [patent_doc_number] => 06418490 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-07-09 [patent_title] => 'Electronic circuit interconnection system using a virtual mirror cross over package' [patent_app_type] => B1 [patent_app_number] => 09/280025 [patent_app_country] => US [patent_app_date] => 1999-03-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 3813 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 412 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/418/06418490.pdf [firstpage_image] =>[orig_patent_app_number] => 09280025 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/280025
Electronic circuit interconnection system using a virtual mirror cross over package Mar 25, 1999 Issued
Array ( [id] => 7645934 [patent_doc_number] => 06477589 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-11-05 [patent_title] => 'Information processing apparatus and method' [patent_app_type] => B1 [patent_app_number] => 09/270210 [patent_app_country] => US [patent_app_date] => 1999-03-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 61 [patent_figures_cnt] => 64 [patent_no_of_words] => 19028 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 6 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/477/06477589.pdf [firstpage_image] =>[orig_patent_app_number] => 09270210 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/270210
Information processing apparatus and method Mar 14, 1999 Issued
Array ( [id] => 7622396 [patent_doc_number] => 06687770 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-02-03 [patent_title] => 'Controlling consumption of time-stamped information by a buffered system' [patent_app_type] => B1 [patent_app_number] => 09/264829 [patent_app_country] => US [patent_app_date] => 1999-03-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 3698 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 4 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/687/06687770.pdf [firstpage_image] =>[orig_patent_app_number] => 09264829 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/264829
Controlling consumption of time-stamped information by a buffered system Mar 7, 1999 Issued
Array ( [id] => 1183468 [patent_doc_number] => 06751695 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-06-15 [patent_title] => 'Bus bridge device for advanced microcontroller bus architecture (AMBA) advanced system bus (ASB) protocol' [patent_app_type] => B1 [patent_app_number] => 09/261005 [patent_app_country] => US [patent_app_date] => 1999-03-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5262 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 149 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/751/06751695.pdf [firstpage_image] =>[orig_patent_app_number] => 09261005 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/261005
Bus bridge device for advanced microcontroller bus architecture (AMBA) advanced system bus (ASB) protocol Mar 1, 1999 Issued
Array ( [id] => 1460158 [patent_doc_number] => 06463546 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-10-08 [patent_title] => 'Method and apparatus for monitoring a microprocessor' [patent_app_type] => B1 [patent_app_number] => 09/230884 [patent_app_country] => US [patent_app_date] => 1999-02-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 23 [patent_no_of_words] => 7469 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 255 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/463/06463546.pdf [firstpage_image] =>[orig_patent_app_number] => 09230884 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/230884
Method and apparatus for monitoring a microprocessor Feb 1, 1999 Issued
Array ( [id] => 1521837 [patent_doc_number] => 06502209 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-12-31 [patent_title] => 'Chip with debug capability' [patent_app_type] => B1 [patent_app_number] => 09/241204 [patent_app_country] => US [patent_app_date] => 1999-02-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 9818 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 161 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/502/06502209.pdf [firstpage_image] =>[orig_patent_app_number] => 09241204 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/241204
Chip with debug capability Jan 31, 1999 Issued
Array ( [id] => 1540681 [patent_doc_number] => 06490695 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-12-03 [patent_title] => 'Platform independent memory image analysis architecture for debugging a computer program' [patent_app_type] => B1 [patent_app_number] => 09/234843 [patent_app_country] => US [patent_app_date] => 1999-01-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 11 [patent_no_of_words] => 6969 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 139 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/490/06490695.pdf [firstpage_image] =>[orig_patent_app_number] => 09234843 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/234843
Platform independent memory image analysis architecture for debugging a computer program Jan 21, 1999 Issued
Array ( [id] => 1549708 [patent_doc_number] => 06374362 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-04-16 [patent_title] => 'Device and method for shared process control' [patent_app_type] => B1 [patent_app_number] => 09/229338 [patent_app_country] => US [patent_app_date] => 1999-01-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4269 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 74 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/374/06374362.pdf [firstpage_image] =>[orig_patent_app_number] => 09229338 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/229338
Device and method for shared process control Jan 12, 1999 Issued
Array ( [id] => 860474 [patent_doc_number] => 07376864 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2008-05-20 [patent_title] => 'Method and system for diagnostic preservation of the state of a computer system' [patent_app_type] => utility [patent_app_number] => 09/223660 [patent_app_country] => US [patent_app_date] => 1998-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 5707 [patent_no_of_claims] => 72 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 24 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/376/07376864.pdf [firstpage_image] =>[orig_patent_app_number] => 09223660 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/223660
Method and system for diagnostic preservation of the state of a computer system Dec 29, 1998 Issued
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