Dhaval V. Patel

Array ( [id] => 1556734 [patent_doc_number] => 06349238 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-02-19 [patent_title] => 'System and method for managing the workflow for processing service orders among a variety of organizations within a telecommunications company' [patent_app_type] => B1 [patent_app_number] => 09/154233 [patent_app_country] => US [patent_app_date] => 1998-09-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 15786 [patent_no_of_claims] => 34 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 139 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/349/06349238.pdf [firstpage_image] =>[orig_patent_app_number] => 09154233 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1481285 [patent_doc_number] => 06389557 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-05-14 [patent_title] => 'Freezing mechanism for debugging' [patent_app_type] => B1 [patent_app_number] => 09/154077 [patent_app_country] => US [patent_app_date] => 1998-09-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 3 [patent_no_of_words] => 3060 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/389/06389557.pdf [firstpage_image] =>[orig_patent_app_number] => 09154077 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4390565 [patent_doc_number] => 06289355 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-09-11 [patent_title] => 'Fast log apply' [patent_app_type] => 1 [patent_app_number] => 9/153998 [patent_app_country] => US [patent_app_date] => 1998-09-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2716 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/289/06289355.pdf [firstpage_image] =>[orig_patent_app_number] => 153998 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1466488 [patent_doc_number] => 06393589 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-05-21 [patent_title] => 'Watchdog timer control circuit with permanent and programmable enablement' [patent_app_type] => B1 [patent_app_number] => 09/154015 [patent_app_country] => US [patent_app_date] => 1998-09-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 1 [patent_no_of_words] => 975 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/393/06393589.pdf [firstpage_image] =>[orig_patent_app_number] => 09154015 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4424712 [patent_doc_number] => 06266784 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-07-24 [patent_title] => 'Direct storage of recovery plan file on remote server for disaster recovery and storage management thereof' [patent_app_type] => 1 [patent_app_number] => 9/153595 [patent_app_country] => US [patent_app_date] => 1998-09-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 12 [patent_no_of_words] => 5011 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/266/06266784.pdf [firstpage_image] =>[orig_patent_app_number] => 153595 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5803592 [patent_doc_number] => 20020010879 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-01-24 [patent_title] => 'APPARATUS AND METHOD FOR FAST CODE COVERAGE ANALYSIS' [patent_app_type] => new [patent_app_number] => 09/153389 [patent_app_country] => US [patent_app_date] => 1998-09-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 5241 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 33 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0010/20020010879.pdf [firstpage_image] =>[orig_patent_app_number] => 09153389 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4268672 [patent_doc_number] => 06138181 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-10-24 [patent_title] => 'CPU mode switching circuit changing operation mode responsive to a power on reset signal and an external reset signal' [patent_app_type] => 1 [patent_app_number] => 9/150740 [patent_app_country] => US [patent_app_date] => 1998-09-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2456 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/138/06138181.pdf [firstpage_image] =>[orig_patent_app_number] => 150740 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4177366 [patent_doc_number] => 06158031 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-12-05 [patent_title] => 'Automated code generating translator for testing telecommunication system devices and method' [patent_app_type] => 1 [patent_app_number] => 9/149369 [patent_app_country] => US [patent_app_date] => 1998-09-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 6535 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/158/06158031.pdf [firstpage_image] =>[orig_patent_app_number] => 149369 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1501589 [patent_doc_number] => 06405299 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-06-11 [patent_title] => 'Internal bus system for DFPS and units with two- or multi-dimensional programmable cell architectures, for managing large volumes of data with a high interconnection complexity' [patent_app_type] => B1 [patent_app_number] => 09/145139 [patent_app_country] => US [patent_app_date] => 1998-08-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 34 [patent_figures_cnt] => 58 [patent_no_of_words] => 13076 [patent_no_of_claims] => 41 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/405/06405299.pdf [firstpage_image] =>[orig_patent_app_number] => 09145139 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4376118 [patent_doc_number] => 06219733 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-04-17 [patent_title] => 'Transmission line loop' [patent_app_type] => 1 [patent_app_number] => 9/140372 [patent_app_country] => US [patent_app_date] => 1998-08-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2264 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 146 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/219/06219733.pdf [firstpage_image] =>[orig_patent_app_number] => 140372 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4123776 [patent_doc_number] => 06101568 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-08-08 [patent_title] => 'Bus interface unit having dual purpose transaction buffer' [patent_app_type] => 1 [patent_app_number] => 9/139243 [patent_app_country] => US [patent_app_date] => 1998-08-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 5130 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 139 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/101/06101568.pdf [firstpage_image] =>[orig_patent_app_number] => 139243 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4279594 [patent_doc_number] => 06205506 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-03-20 [patent_title] => 'Bus interface unit having multipurpose transaction buffer' [patent_app_type] => 1 [patent_app_number] => 9/139555 [patent_app_country] => US [patent_app_date] => 1998-08-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4804 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/205/06205506.pdf [firstpage_image] =>[orig_patent_app_number] => 139555 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1466651 [patent_doc_number] => 06351786 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2002-02-26 [patent_title] => 'VXI backplane system improvements and methods' [patent_app_type] => B2 [patent_app_number] => 09/138972 [patent_app_country] => US [patent_app_date] => 1998-08-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 7865 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 145 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/351/06351786.pdf [firstpage_image] =>[orig_patent_app_number] => 09138972 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4397879 [patent_doc_number] => 06304793 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-10-16 [patent_title] => 'Embroidery data editing device' [patent_app_type] => 1 [patent_app_number] => 9/139016 [patent_app_country] => US [patent_app_date] => 1998-08-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 19 [patent_no_of_words] => 16341 [patent_no_of_claims] => 34 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/304/06304793.pdf [firstpage_image] =>[orig_patent_app_number] => 139016 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4423581 [patent_doc_number] => 06240476 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-05-29 [patent_title] => 'Dynamic allocation of bus master control lines to peripheral devices' [patent_app_type] => 1 [patent_app_number] => 9/137490 [patent_app_country] => US [patent_app_date] => 1998-08-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 2697 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 142 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/240/06240476.pdf [firstpage_image] =>[orig_patent_app_number] => 137490 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4322830 [patent_doc_number] => 06253113 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-06-26 [patent_title] => 'Controllers that determine optimal tuning parameters for use in process control systems and methods of operating the same' [patent_app_type] => 1 [patent_app_number] => 9/137358 [patent_app_country] => US [patent_app_date] => 1998-08-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 3987 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 141 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/253/06253113.pdf [firstpage_image] =>[orig_patent_app_number] => 137358 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7015619 [patent_doc_number] => 20010051839 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-12-13 [patent_title] => 'DIFFERENTIAL PROCESS CONTROL METHOD' [patent_app_type] => new [patent_app_number] => 09/137031 [patent_app_country] => US [patent_app_date] => 1998-08-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 1174 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0051/20010051839.pdf [firstpage_image] =>[orig_patent_app_number] => 09137031 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1182464 [patent_doc_number] => 06751526 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-06-15 [patent_title] => 'Method for describing robot structure and part of robot' [patent_app_type] => B2 [patent_app_number] => 09/135973 [patent_app_country] => US [patent_app_date] => 1998-08-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 5385 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/751/06751526.pdf [firstpage_image] =>[orig_patent_app_number] => 09135973 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4422052 [patent_doc_number] => 06240331 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-05-29 [patent_title] => 'Integrated management of semiconductor process data' [patent_app_type] => 1 [patent_app_number] => 9/135652 [patent_app_country] => US [patent_app_date] => 1998-08-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3942 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 322 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/240/06240331.pdf [firstpage_image] =>[orig_patent_app_number] => 135652 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1082725 [patent_doc_number] => 06836695 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-12-28 [patent_title] => 'Automatically generating embroidery designs from a scanned image' [patent_app_type] => B1 [patent_app_number] => 09/134981 [patent_app_country] => US [patent_app_date] => 1998-08-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 20 [patent_no_of_words] => 11958 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/836/06836695.pdf [firstpage_image] =>[orig_patent_app_number] => 09134981 [rel_patent_id] =>[rel_patent_doc_number] =>)