Dhirubhai R Patel

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Array ( [id] => 9866651 [patent_doc_number] => 20150046670 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-02-12 [patent_title] => 'STORAGE SYSTEM AND WRITING METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 14/451000 [patent_app_country] => US [patent_app_date] => 2014-08-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 8456 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14451000 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10688241 [patent_doc_number] => 20160034386 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-02-04 [patent_title] => 'CONTROLLING WEAR AMONG FLASH MEMORY DEVICES BASED ON REMAINING WARRANTY' [patent_app_type] => utility [patent_app_number] => 14/450437 [patent_app_country] => US [patent_app_date] => 2014-08-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3650 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14450437 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9897130 [patent_doc_number] => 20150052329 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-02-19 [patent_title] => 'MEMORY CONTROL DEVICE, HOST COMPUTER, INFORMATION PROCESSING SYSTEM AND METHOD OF CONTROLLING MEMORY CONTROL DEVICE' [patent_app_type] => utility [patent_app_number] => 14/451068 [patent_app_country] => US [patent_app_date] => 2014-08-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 34 [patent_figures_cnt] => 34 [patent_no_of_words] => 21068 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14451068 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10688074 [patent_doc_number] => 20160034219 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-02-04 [patent_title] => 'SYSTEM AND METHOD OF CALIBRATION OF MEMORY INTERFACE DURING LOW POWER OPERATION' [patent_app_type] => utility [patent_app_number] => 14/450525 [patent_app_country] => US [patent_app_date] => 2014-08-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3435 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14450525 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10688254 [patent_doc_number] => 20160034399 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-02-04 [patent_title] => 'BUS-BASED CACHE ARCHITECTURE' [patent_app_type] => utility [patent_app_number] => 14/450145 [patent_app_country] => US [patent_app_date] => 2014-08-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 11527 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14450145 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10688257 [patent_doc_number] => 20160034401 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-02-04 [patent_title] => 'Instruction Cache Management Based on Temporal Locality' [patent_app_type] => utility [patent_app_number] => 14/450060 [patent_app_country] => US [patent_app_date] => 2014-08-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 10799 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14450060 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11384761 [patent_doc_number] => 20170010816 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-01-12 [patent_title] => 'PROVIDING COMBINED DATA FROM A CACHE AND A STORAGE DEVICE' [patent_app_type] => utility [patent_app_number] => 15/114261 [patent_app_country] => US [patent_app_date] => 2014-04-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 7819 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15114261 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11452019 [patent_doc_number] => 09575660 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-02-21 [patent_title] => 'Flexibly storing defined presets for configuration of storage controller' [patent_app_type] => utility [patent_app_number] => 14/215189 [patent_app_country] => US [patent_app_date] => 2014-03-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4042 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 172 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14215189 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10376674 [patent_doc_number] => 20150261681 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-09-17 [patent_title] => 'HOST BRIDGE WITH CACHE HINTS' [patent_app_type] => utility [patent_app_number] => 14/211518 [patent_app_country] => US [patent_app_date] => 2014-03-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5566 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14211518 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10376694 [patent_doc_number] => 20150261701 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-09-17 [patent_title] => 'DEVICE TABLE IN SYSTEM MEMORY' [patent_app_type] => utility [patent_app_number] => 14/211425 [patent_app_country] => US [patent_app_date] => 2014-03-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5586 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14211425 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10376451 [patent_doc_number] => 20150261458 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-09-17 [patent_title] => 'ONE-TIME PROGRAMMING IN REPROGRAMMABLE MEMORY' [patent_app_type] => utility [patent_app_number] => 14/213732 [patent_app_country] => US [patent_app_date] => 2014-03-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 7040 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14213732 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10376686 [patent_doc_number] => 20150261693 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-09-17 [patent_title] => 'DYNAMIC STORAGE KEY ASSIGNMENT' [patent_app_type] => utility [patent_app_number] => 14/211168 [patent_app_country] => US [patent_app_date] => 2014-03-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3737 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14211168 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10376669 [patent_doc_number] => 20150261676 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-09-17 [patent_title] => 'COHERENCE PROTOCOL AUGMENTATION TO INDICATE TRANSACTION STATUS' [patent_app_type] => utility [patent_app_number] => 14/212217 [patent_app_country] => US [patent_app_date] => 2014-03-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 23220 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14212217 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10376681 [patent_doc_number] => 20150261688 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-09-17 [patent_title] => 'EXTENDED PAGE TABLE FOR I/O ADDRESS TRANSLATION' [patent_app_type] => utility [patent_app_number] => 14/210968 [patent_app_country] => US [patent_app_date] => 2014-03-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4652 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14210968 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9787639 [patent_doc_number] => 20140304459 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-10-09 [patent_title] => 'MULTI LEVEL CELL MEMORY SYSTEM' [patent_app_type] => utility [patent_app_number] => 14/210883 [patent_app_country] => US [patent_app_date] => 2014-03-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 6720 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14210883 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11292419 [patent_doc_number] => 20160342352 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-11-24 [patent_title] => 'ENCODING DATA IN A MEMORY ARRAY' [patent_app_type] => utility [patent_app_number] => 15/114939 [patent_app_country] => US [patent_app_date] => 2014-01-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 6192 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15114939 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10327751 [patent_doc_number] => 20150212755 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-07-30 [patent_title] => 'METHOD OF MANAGING THROUGHPUT OF REDUNDANT ARRAY OF INDEPENDENT DISKS (RAID) GROUPS IN A SOLID STATE DISK ARRAY' [patent_app_type] => utility [patent_app_number] => 14/168642 [patent_app_country] => US [patent_app_date] => 2014-01-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5469 [patent_no_of_claims] => 34 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14168642 [rel_patent_id] =>[rel_patent_doc_number] =>)

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