Search

Diana Cheng

Examiner (ID: 1053, Phone: (571)270-1197 , Office: P/2842 )

Most Active Art Unit
2849
Art Unit(s)
2849, 2816, 2842, 2892
Total Applications
1059
Issued Applications
859
Pending Applications
71
Abandoned Applications
157

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 19851448 [patent_doc_number] => 20250096799 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-03-20 [patent_title] => PROTECTION STRUCTURE FOR AN ENHANCEMENT-MODE FET OF A CIRCUIT AND CORRESPONDING METHOD [patent_app_type] => utility [patent_app_number] => 18/819313 [patent_app_country] => US [patent_app_date] => 2024-08-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8222 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18819313 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/819313
PROTECTION STRUCTURE FOR AN ENHANCEMENT-MODE FET OF A CIRCUIT AND CORRESPONDING METHOD Aug 28, 2024 Pending
Array ( [id] => 19697251 [patent_doc_number] => 20250015796 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-01-09 [patent_title] => DETECTION OF LEAKAGE CURRENTS IN INTELLIGENT SEMICONDUCTOR SWITCH [patent_app_type] => utility [patent_app_number] => 18/763431 [patent_app_country] => US [patent_app_date] => 2024-07-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5302 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 77 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18763431 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/763431
DETECTION OF LEAKAGE CURRENTS IN INTELLIGENT SEMICONDUCTOR SWITCH Jul 2, 2024 Pending
Array ( [id] => 20265516 [patent_doc_number] => 12436504 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-10-07 [patent_title] => Using time-to-digital converters to delay signals with high accuracy and large range [patent_app_type] => utility [patent_app_number] => 18/673897 [patent_app_country] => US [patent_app_date] => 2024-05-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 0 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 161 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18673897 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/673897
Using time-to-digital converters to delay signals with high accuracy and large range May 23, 2024 Issued
Array ( [id] => 20325314 [patent_doc_number] => 20250337402 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-10-30 [patent_title] => GATE DRIVE CIRCUIT [patent_app_type] => utility [patent_app_number] => 18/663108 [patent_app_country] => US [patent_app_date] => 2024-05-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 0 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18663108 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/663108
GATE DRIVE CIRCUIT May 13, 2024 Pending
Array ( [id] => 19750172 [patent_doc_number] => 20250038737 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-01-30 [patent_title] => SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 18/659670 [patent_app_country] => US [patent_app_date] => 2024-05-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6529 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -5 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18659670 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/659670
SEMICONDUCTOR DEVICE May 8, 2024 Pending
Array ( [id] => 19750172 [patent_doc_number] => 20250038737 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-01-30 [patent_title] => SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 18/659670 [patent_app_country] => US [patent_app_date] => 2024-05-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6529 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -5 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18659670 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/659670
SEMICONDUCTOR DEVICE May 8, 2024 Pending
Array ( [id] => 20353434 [patent_doc_number] => 20250350286 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-11-13 [patent_title] => CHARGE INJECTION REDUCTION IN A FRACTIONAL-N FREQUENCY SYNTHESIZER [patent_app_type] => utility [patent_app_number] => 18/657260 [patent_app_country] => US [patent_app_date] => 2024-05-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2590 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18657260 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/657260
CHARGE INJECTION REDUCTION IN A FRACTIONAL-N FREQUENCY SYNTHESIZER May 6, 2024 Pending
Array ( [id] => 20197402 [patent_doc_number] => 20250274112 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-08-28 [patent_title] => CLOCK SIGNAL DUTY RATIO CORRECTION CIRCUIT AND METHOD OF CORRECTING DUTY RATIO [patent_app_type] => utility [patent_app_number] => 18/656733 [patent_app_country] => US [patent_app_date] => 2024-05-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 0 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -22 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18656733 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/656733
CLOCK SIGNAL DUTY RATIO CORRECTION CIRCUIT AND METHOD OF CORRECTING DUTY RATIO May 6, 2024 Pending
Array ( [id] => 20339431 [patent_doc_number] => 20250343551 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-11-06 [patent_title] => DELAY LINE TEMPERATURE CALIBRATION [patent_app_type] => utility [patent_app_number] => 18/656442 [patent_app_country] => US [patent_app_date] => 2024-05-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7792 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18656442 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/656442
DELAY LINE TEMPERATURE CALIBRATION May 5, 2024 Pending
Array ( [id] => 20298407 [patent_doc_number] => 20250323650 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-10-16 [patent_title] => PLL WITH A CONTROLLED RANGE OF OUTPUT FREQUENCY FOR MEMS GYROSCOPE [patent_app_type] => utility [patent_app_number] => 18/635877 [patent_app_country] => US [patent_app_date] => 2024-04-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4535 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 155 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18635877 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/635877
PLL WITH A CONTROLLED RANGE OF OUTPUT FREQUENCY FOR MEMS GYROSCOPE Apr 14, 2024 Pending
Array ( [id] => 20298390 [patent_doc_number] => 20250323633 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-10-16 [patent_title] => PRESCALER WITH DIFFERENTIAL CLOCK INPUTS FOR HIGH FREQUENCY OPERATION [patent_app_type] => utility [patent_app_number] => 18/633978 [patent_app_country] => US [patent_app_date] => 2024-04-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 0 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18633978 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/633978
PRESCALER WITH DIFFERENTIAL CLOCK INPUTS FOR HIGH FREQUENCY OPERATION Apr 11, 2024 Pending
Array ( [id] => 20298390 [patent_doc_number] => 20250323633 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-10-16 [patent_title] => PRESCALER WITH DIFFERENTIAL CLOCK INPUTS FOR HIGH FREQUENCY OPERATION [patent_app_type] => utility [patent_app_number] => 18/633978 [patent_app_country] => US [patent_app_date] => 2024-04-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 0 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18633978 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/633978
PRESCALER WITH DIFFERENTIAL CLOCK INPUTS FOR HIGH FREQUENCY OPERATION Apr 11, 2024 Pending
Array ( [id] => 19421528 [patent_doc_number] => 20240297652 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-09-05 [patent_title] => DUAL MODE PHASE-LOCKED LOOP CIRCUIT, OSCILLATOR CIRCUIT, AND CONTROL METHOD OF OSCILLATOR CIRCUIT [patent_app_type] => utility [patent_app_number] => 18/632006 [patent_app_country] => US [patent_app_date] => 2024-04-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8739 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 169 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18632006 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/632006
Dual mode phase-locked loop circuit, oscillator circuit, and control method of oscillator circuit Apr 9, 2024 Issued
Array ( [id] => 19350047 [patent_doc_number] => 20240259011 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-08-01 [patent_title] => TEMPERATURE-SENSITIVE SAMPLING [patent_app_type] => utility [patent_app_number] => 18/630020 [patent_app_country] => US [patent_app_date] => 2024-04-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6772 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18630020 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/630020
TEMPERATURE-SENSITIVE SAMPLING Apr 8, 2024 Pending
Array ( [id] => 19547304 [patent_doc_number] => 20240364340 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-10-31 [patent_title] => LEVEL SHIFTER HAVING CURRENT BOOSTING STAGES [patent_app_type] => utility [patent_app_number] => 18/627941 [patent_app_country] => US [patent_app_date] => 2024-04-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4913 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 155 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18627941 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/627941
LEVEL SHIFTER HAVING CURRENT BOOSTING STAGES Apr 4, 2024 Pending
Array ( [id] => 19547304 [patent_doc_number] => 20240364340 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-10-31 [patent_title] => LEVEL SHIFTER HAVING CURRENT BOOSTING STAGES [patent_app_type] => utility [patent_app_number] => 18/627941 [patent_app_country] => US [patent_app_date] => 2024-04-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4913 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 155 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18627941 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/627941
LEVEL SHIFTER HAVING CURRENT BOOSTING STAGES Apr 4, 2024 Pending
Array ( [id] => 19893819 [patent_doc_number] => 20250119131 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-04-10 [patent_title] => HIGH-SENSITIVITY DELAY CELLS AND CIRCUITS OF DETECTING THRESHOLD VOLTAGE [patent_app_type] => utility [patent_app_number] => 18/626494 [patent_app_country] => US [patent_app_date] => 2024-04-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10865 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 176 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18626494 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/626494
HIGH-SENSITIVITY DELAY CELLS AND CIRCUITS OF DETECTING THRESHOLD VOLTAGE Apr 3, 2024 Pending
Array ( [id] => 20291812 [patent_doc_number] => 20250317055 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-10-09 [patent_title] => DUTY CYCLE CORRECTOR SYSTEMATIC OFFSET REDUCTION [patent_app_type] => utility [patent_app_number] => 18/626770 [patent_app_country] => US [patent_app_date] => 2024-04-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4795 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18626770 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/626770
DUTY CYCLE CORRECTOR SYSTEMATIC OFFSET REDUCTION Apr 3, 2024 Pending
Array ( [id] => 19500994 [patent_doc_number] => 20240340012 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-10-10 [patent_title] => CLOCK GENERATION DEVICE AND CLOCK GENERATION METHOD USING THE SAME [patent_app_type] => utility [patent_app_number] => 18/624590 [patent_app_country] => US [patent_app_date] => 2024-04-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10941 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 140 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18624590 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/624590
CLOCK GENERATION DEVICE AND CLOCK GENERATION METHOD USING THE SAME Apr 1, 2024 Pending
Array ( [id] => 20284519 [patent_doc_number] => 20250309761 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-10-02 [patent_title] => METHODS AND APPARATUS TO REDUCE INTERFERENCE ASSOCIATED WITH A CHARGE PUMP [patent_app_type] => utility [patent_app_number] => 18/620622 [patent_app_country] => US [patent_app_date] => 2024-03-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4407 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 44 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18620622 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/620622
METHODS AND APPARATUS TO REDUCE INTERFERENCE ASSOCIATED WITH A CHARGE PUMP Mar 27, 2024 Pending
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