Search

Diana Cheng

Examiner (ID: 309, Phone: (571)270-1197 , Office: P/2842 )

Most Active Art Unit
2849
Art Unit(s)
2892, 2816, 2849, 2842
Total Applications
1075
Issued Applications
877
Pending Applications
59
Abandoned Applications
157

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 16817796 [patent_doc_number] => 11002612 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-05-11 [patent_title] => Temperature sensor [patent_app_type] => utility [patent_app_number] => 16/272554 [patent_app_country] => US [patent_app_date] => 2019-02-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 16 [patent_no_of_words] => 4861 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 166 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16272554 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/272554
Temperature sensor Feb 10, 2019 Issued
Array ( [id] => 14383741 [patent_doc_number] => 20190165783 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-05-30 [patent_title] => POWER SEMICONDUCTOR DRIVE CIRCUIT, POWER SEMICONDUCTOR CIRCUIT, AND POWER MODULE CIRCUIT DEVICE [patent_app_type] => utility [patent_app_number] => 16/263409 [patent_app_country] => US [patent_app_date] => 2019-01-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12599 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -20 [patent_words_short_claim] => 168 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16263409 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/263409
Power semiconductor drive circuit, power semiconductor circuit, and power module circuit device Jan 30, 2019 Issued
Array ( [id] => 15515737 [patent_doc_number] => 10564450 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2020-02-18 [patent_title] => Electrical amplifier and electro-optical device comprising an electrical amplifier [patent_app_type] => utility [patent_app_number] => 16/246258 [patent_app_country] => US [patent_app_date] => 2019-01-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5027 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 173 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16246258 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/246258
Electrical amplifier and electro-optical device comprising an electrical amplifier Jan 10, 2019 Issued
Array ( [id] => 15539801 [patent_doc_number] => 10569664 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-02-25 [patent_title] => Methods and systems for managing power supply at a device [patent_app_type] => utility [patent_app_number] => 16/241917 [patent_app_country] => US [patent_app_date] => 2019-01-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 10748 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 167 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16241917 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/241917
Methods and systems for managing power supply at a device Jan 6, 2019 Issued
Array ( [id] => 16076865 [patent_doc_number] => 20200192419 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-06-18 [patent_title] => DUTY CYCLE CONTROL FOR REDUCED DYNAMIC POWER CONSUMPTION [patent_app_type] => utility [patent_app_number] => 16/219029 [patent_app_country] => US [patent_app_date] => 2018-12-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4528 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 65 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16219029 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/219029
Duty cycle control for reduced dynamic power consumption Dec 12, 2018 Issued
Array ( [id] => 16082505 [patent_doc_number] => 20200195239 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-06-18 [patent_title] => DUTY CYCLE CONTROL CIRCUITRY FOR INPUT/OUTPUT (I/O) MARGIN CONTROL [patent_app_type] => utility [patent_app_number] => 16/218053 [patent_app_country] => US [patent_app_date] => 2018-12-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15359 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16218053 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/218053
Duty cycle control circuitry for input/output (I/O) margin control Dec 11, 2018 Issued
Array ( [id] => 16684775 [patent_doc_number] => 10944270 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2021-03-09 [patent_title] => GaN circuit drivers for GaN circuit loads [patent_app_type] => utility [patent_app_number] => 16/212370 [patent_app_country] => US [patent_app_date] => 2018-12-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 34 [patent_figures_cnt] => 43 [patent_no_of_words] => 24791 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 74 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16212370 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/212370
GaN circuit drivers for GaN circuit loads Dec 5, 2018 Issued
Array ( [id] => 16553725 [patent_doc_number] => 10886902 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-01-05 [patent_title] => Superconducting circuit and method for detecting a rising edge of an input signal [patent_app_type] => utility [patent_app_number] => 16/210130 [patent_app_country] => US [patent_app_date] => 2018-12-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5385 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16210130 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/210130
Superconducting circuit and method for detecting a rising edge of an input signal Dec 4, 2018 Issued
Array ( [id] => 15875199 [patent_doc_number] => 20200145003 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-05-07 [patent_title] => INTEGRATED CIRCUIT DELAY CELL [patent_app_type] => utility [patent_app_number] => 16/183724 [patent_app_country] => US [patent_app_date] => 2018-11-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2966 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16183724 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/183724
Integrated circuit delay cell Nov 6, 2018 Issued
Array ( [id] => 16909859 [patent_doc_number] => 11041892 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-06-22 [patent_title] => Semiconductor device, semiconductor system, and control method of the same [patent_app_type] => utility [patent_app_number] => 16/182104 [patent_app_country] => US [patent_app_date] => 2018-11-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 7350 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 153 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16182104 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/182104
Semiconductor device, semiconductor system, and control method of the same Nov 5, 2018 Issued
Array ( [id] => 16448975 [patent_doc_number] => 10840910 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-11-17 [patent_title] => Apparatuses and methods for level shifting [patent_app_type] => utility [patent_app_number] => 16/177821 [patent_app_country] => US [patent_app_date] => 2018-11-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 9 [patent_no_of_words] => 4260 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 196 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16177821 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/177821
Apparatuses and methods for level shifting Oct 31, 2018 Issued
Array ( [id] => 14511357 [patent_doc_number] => 20190199333 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-06-27 [patent_title] => SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 16/176423 [patent_app_country] => US [patent_app_date] => 2018-10-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4126 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -6 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16176423 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/176423
SEMICONDUCTOR DEVICE Oct 30, 2018 Abandoned
Array ( [id] => 14472187 [patent_doc_number] => 20190187737 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-06-20 [patent_title] => SEMICONDUCTOR DEVICE, SENSOR TERMINAL, AND SEMICONDUCTOR DEVICE CONTROL METHOD [patent_app_type] => utility [patent_app_number] => 16/173576 [patent_app_country] => US [patent_app_date] => 2018-10-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9374 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16173576 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/173576
SEMICONDUCTOR DEVICE, SENSOR TERMINAL, AND SEMICONDUCTOR DEVICE CONTROL METHOD Oct 28, 2018 Abandoned
Array ( [id] => 13991405 [patent_doc_number] => 20190064860 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-02-28 [patent_title] => LOW DROPOUT VOLTAGE (LDO) REGULATOR INCLUDING A DUAL LOOP CIRCUIT AND AN APPLICATION PROCESSOR AND A USER DEVICE INCLUDING THE SAME [patent_app_type] => utility [patent_app_number] => 16/170124 [patent_app_country] => US [patent_app_date] => 2018-10-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10626 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 151 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16170124 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/170124
Low dropout voltage (LDO) regulator including a dual loop circuit and an application processor and a user device including the same Oct 24, 2018 Issued
Array ( [id] => 15759819 [patent_doc_number] => 10622036 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-04-14 [patent_title] => Semiconductor system [patent_app_type] => utility [patent_app_number] => 16/169746 [patent_app_country] => US [patent_app_date] => 2018-10-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 7047 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16169746 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/169746
Semiconductor system Oct 23, 2018 Issued
Array ( [id] => 17137855 [patent_doc_number] => 11139424 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-10-05 [patent_title] => High-saturation power Josephson ring modulators [patent_app_type] => utility [patent_app_number] => 16/166211 [patent_app_country] => US [patent_app_date] => 2018-10-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 9919 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16166211 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/166211
High-saturation power Josephson ring modulators Oct 21, 2018 Issued
Array ( [id] => 13880387 [patent_doc_number] => 20190036534 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-01-31 [patent_title] => DIGITAL PHASE LOCKED LOOP FOR LOW JITTER APPLICATIONS [patent_app_type] => utility [patent_app_number] => 16/152678 [patent_app_country] => US [patent_app_date] => 2018-10-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9213 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -11 [patent_words_short_claim] => 47 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16152678 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/152678
Digital phase locked loop for low jitter applications Oct 4, 2018 Issued
Array ( [id] => 14678021 [patent_doc_number] => 20190238125 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-08-01 [patent_title] => SAMPLING CIRCUITRY WITH TEMPERATURE INSENSITIVE BANDWIDTH [patent_app_type] => utility [patent_app_number] => 16/121449 [patent_app_country] => US [patent_app_date] => 2018-09-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3634 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16121449 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/121449
SAMPLING CIRCUITRY WITH TEMPERATURE INSENSITIVE BANDWIDTH Sep 3, 2018 Abandoned
Array ( [id] => 13742063 [patent_doc_number] => 20180375501 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-12-27 [patent_title] => SET-RESET LATCHES [patent_app_type] => utility [patent_app_number] => 16/121570 [patent_app_country] => US [patent_app_date] => 2018-09-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6795 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 53 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16121570 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/121570
Set-reset latches Sep 3, 2018 Issued
Array ( [id] => 16553659 [patent_doc_number] => 10886834 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2021-01-05 [patent_title] => Power converter [patent_app_type] => utility [patent_app_number] => 16/119429 [patent_app_country] => US [patent_app_date] => 2018-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 29 [patent_no_of_words] => 8793 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 148 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16119429 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/119429
Power converter Aug 30, 2018 Issued
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