
Diana Cheng
Examiner (ID: 15822, Phone: (571)270-1197 , Office: P/2842 )
| Most Active Art Unit | 2842 |
| Art Unit(s) | 2816, 2836, 2892, 2842, 2849 |
| Total Applications | 1074 |
| Issued Applications | 880 |
| Pending Applications | 54 |
| Abandoned Applications | 157 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 11631382
[patent_doc_number] => 20170141571
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[patent_title] => 'MIXED SIGNAL CONTROLLER'
[patent_app_type] => utility
[patent_app_number] => 15/218070
[patent_app_country] => US
[patent_app_date] => 2016-07-24
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[rel_patent_id] =>[rel_patent_doc_number] =>) 15/218070 | Mixed signal controller | Jul 23, 2016 | Issued |
Array
(
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[patent_doc_number] => 20180026613
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[patent_kind] => A1
[patent_issue_date] => 2018-01-25
[patent_title] => 'BALANCING DELAY ASSOCIATED WITH DUAL-EDGE TRIGGER CLOCK GATERS'
[patent_app_type] => utility
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[rel_patent_id] =>[rel_patent_doc_number] =>) 15/217122 | Balancing delay associated with dual-edge trigger clock gaters | Jul 21, 2016 | Issued |
Array
(
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[patent_issue_date] => 2017-07-27
[patent_title] => 'LOW DROPOUT VOLTAGE (LDO) REGULATOR INCLUDING A DUAL LOOP CIRCUIT AND AN APPLICATION PROCESSOR AND A USER DEVICE INCLUDING THE SAME'
[patent_app_type] => utility
[patent_app_number] => 15/216147
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[rel_patent_id] =>[rel_patent_doc_number] =>) 15/216147 | Low dropout voltage (LDO) regulator including a dual loop circuit and an application processor and a user device including the same | Jul 20, 2016 | Issued |
Array
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[patent_kind] => A1
[patent_issue_date] => 2018-01-25
[patent_title] => 'ULTRA-LOW POWER CROSS-POINT ELECTRONIC SWITCH APPARATUS AND METHOD'
[patent_app_type] => utility
[patent_app_number] => 15/213541
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[rel_patent_id] =>[rel_patent_doc_number] =>) 15/213541 | Ultra-low power cross-point electronic switch apparatus and method | Jul 18, 2016 | Issued |
Array
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[patent_title] => 'SYSTEMS AND METHODS FOR NON-VOLATILE FLIP FLOPS'
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Array
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[patent_title] => 'MIXED-TECHNOLOGY COMBINATION OF PROGRAMMABLE ELEMENTS'
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Array
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[patent_title] => 'APPARATUS, SYSTEMS AND METHODS FOR GENERATING VOLTAGE EXCITATION WAVEFORMS'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 15/210498 | Apparatus, systems and methods for generating voltage excitation waveforms | Jul 13, 2016 | Issued |
Array
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Array
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Array
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[patent_title] => 'Method And System For Cancellation Of Spurious Signals'
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Array
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[rel_patent_id] =>[rel_patent_doc_number] =>) 15/190874 | System and method for a switching transistor | Jun 22, 2016 | Issued |
Array
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Array
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Array
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Array
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[patent_title] => 'TRANSMITTER WITH FEEDBACK TERMINATED PREEMPHASIS'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 15/174842 | Transmitter with feedback terminated preemphasis | Jun 5, 2016 | Issued |
Array
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[rel_patent_id] =>[rel_patent_doc_number] =>) 15/170797 | Phase-locked loop having sampling phase detector | May 31, 2016 | Issued |