Search

Dilinh P. Nguyen

Examiner (ID: 17194, Phone: (571)272-1712 , Office: P/2893 )

Most Active Art Unit
2893
Art Unit(s)
2894, 2818, 2893, 2814
Total Applications
984
Issued Applications
760
Pending Applications
22
Abandoned Applications
204

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 18857329 [patent_doc_number] => 11854924 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-12-26 [patent_title] => Semiconductor package with improved reliability [patent_app_type] => utility [patent_app_number] => 17/512665 [patent_app_country] => US [patent_app_date] => 2021-10-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 2165 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 185 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17512665 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/512665
Semiconductor package with improved reliability Oct 26, 2021 Issued
Array ( [id] => 19029945 [patent_doc_number] => 11929311 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-03-12 [patent_title] => Isolated semiconductor package with HV isolator on block [patent_app_type] => utility [patent_app_number] => 17/502706 [patent_app_country] => US [patent_app_date] => 2021-10-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 10 [patent_no_of_words] => 2603 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 212 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17502706 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/502706
Isolated semiconductor package with HV isolator on block Oct 14, 2021 Issued
Array ( [id] => 18874759 [patent_doc_number] => 11862582 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-01-02 [patent_title] => Package with elevated lead and structure extending vertically from encapsulant bottom [patent_app_type] => utility [patent_app_number] => 17/502084 [patent_app_country] => US [patent_app_date] => 2021-10-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 16 [patent_no_of_words] => 10251 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 157 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17502084 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/502084
Package with elevated lead and structure extending vertically from encapsulant bottom Oct 14, 2021 Issued
Array ( [id] => 17551874 [patent_doc_number] => 20220123216 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-04-21 [patent_title] => FLUORINATED POLYMERS WITH LOW DIELECTRIC LOSS FOR ENVIRONMENTAL PROTECTION IN SEMICONDUCTOR DEVICES [patent_app_type] => utility [patent_app_number] => 17/501111 [patent_app_country] => US [patent_app_date] => 2021-10-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5909 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 55 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17501111 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/501111
Fluorinated polymers with low dielectric loss for environmental protection in semiconductor devices Oct 13, 2021 Issued
Array ( [id] => 18766905 [patent_doc_number] => 11817314 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-11-14 [patent_title] => Method of processing substrate, method of manufacturing semiconductor device, substrate processing apparatus, and recording medium [patent_app_type] => utility [patent_app_number] => 17/497570 [patent_app_country] => US [patent_app_date] => 2021-10-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 12 [patent_no_of_words] => 12307 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 187 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17497570 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/497570
Method of processing substrate, method of manufacturing semiconductor device, substrate processing apparatus, and recording medium Oct 7, 2021 Issued
Array ( [id] => 17536636 [patent_doc_number] => 20220115245 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-04-14 [patent_title] => POWER SEMICONDUCTOR PACKAGE AND METHOD FOR FABRICATING A POWER SEMICONDUCTOR PACKAGE [patent_app_type] => utility [patent_app_number] => 17/492865 [patent_app_country] => US [patent_app_date] => 2021-10-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5828 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 65 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17492865 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/492865
POWER SEMICONDUCTOR PACKAGE AND METHOD FOR FABRICATING A POWER SEMICONDUCTOR PACKAGE Oct 3, 2021 Abandoned
Array ( [id] => 17692300 [patent_doc_number] => 20220199593 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-06-23 [patent_title] => SEMICONDUCTOR DEVICE WITH DUMMY THERMAL FEATURES ON INTERPOSER [patent_app_type] => utility [patent_app_number] => 17/492693 [patent_app_country] => US [patent_app_date] => 2021-10-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3455 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -23 [patent_words_short_claim] => 61 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17492693 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/492693
Semiconductor device with dummy thermal features on interposer Oct 3, 2021 Issued
Array ( [id] => 19260951 [patent_doc_number] => 12021017 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-06-25 [patent_title] => Semiconductor package and manufacturing method thereof [patent_app_type] => utility [patent_app_number] => 17/492093 [patent_app_country] => US [patent_app_date] => 2021-10-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 21 [patent_no_of_words] => 7759 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 238 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17492093 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/492093
Semiconductor package and manufacturing method thereof Sep 30, 2021 Issued
Array ( [id] => 19016319 [patent_doc_number] => 11923261 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-03-05 [patent_title] => Semiconductor device [patent_app_type] => utility [patent_app_number] => 17/487674 [patent_app_country] => US [patent_app_date] => 2021-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 2840 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17487674 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/487674
Semiconductor device Sep 27, 2021 Issued
Array ( [id] => 18281008 [patent_doc_number] => 20230096480 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-03-30 [patent_title] => ANTI-WHISKER COUNTER MEASURE USING A METHOD FOR MULTIPLE LAYER PLATING OF A LEAD FRAME [patent_app_type] => utility [patent_app_number] => 17/488056 [patent_app_country] => US [patent_app_date] => 2021-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2786 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -30 [patent_words_short_claim] => 50 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17488056 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/488056
ANTI-WHISKER COUNTER MEASURE USING A METHOD FOR MULTIPLE LAYER PLATING OF A LEAD FRAME Sep 27, 2021 Abandoned
Array ( [id] => 17551564 [patent_doc_number] => 20220122906 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-04-21 [patent_title] => STACKED TRANSISTOR CHIP PACKAGE WITH SOURCE COUPLING [patent_app_type] => utility [patent_app_number] => 17/485742 [patent_app_country] => US [patent_app_date] => 2021-09-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10757 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 50 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17485742 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/485742
Stacked transistor chip package with source coupling Sep 26, 2021 Issued
Array ( [id] => 18688428 [patent_doc_number] => 11784173 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-10-10 [patent_title] => Semiconductor device including a circuit for transmitting a signal [patent_app_type] => utility [patent_app_number] => 17/486301 [patent_app_country] => US [patent_app_date] => 2021-09-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 10937 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 554 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17486301 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/486301
Semiconductor device including a circuit for transmitting a signal Sep 26, 2021 Issued
Array ( [id] => 19183793 [patent_doc_number] => 11990394 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-05-21 [patent_title] => Semiconductor package and a method for manufacturing of a semiconductor package [patent_app_type] => utility [patent_app_number] => 17/475612 [patent_app_country] => US [patent_app_date] => 2021-09-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3189 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17475612 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/475612
Semiconductor package and a method for manufacturing of a semiconductor package Sep 14, 2021 Issued
Array ( [id] => 18623810 [patent_doc_number] => 11756866 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-09-12 [patent_title] => Lead frame and semiconductor device [patent_app_type] => utility [patent_app_number] => 17/469129 [patent_app_country] => US [patent_app_date] => 2021-09-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 24 [patent_no_of_words] => 5717 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17469129 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/469129
Lead frame and semiconductor device Sep 7, 2021 Issued
Array ( [id] => 17463776 [patent_doc_number] => 20220077082 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-03-10 [patent_title] => SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 17/465973 [patent_app_country] => US [patent_app_date] => 2021-09-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 33752 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 239 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17465973 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/465973
Semiconductor device with a transmitting insulating element Sep 2, 2021 Issued
Array ( [id] => 17536694 [patent_doc_number] => 20220115303 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-04-14 [patent_title] => SEMICONDUCTOR PACKAGE WITH IMPROVED BOARD LEVEL RELIABILITY [patent_app_type] => utility [patent_app_number] => 17/460352 [patent_app_country] => US [patent_app_date] => 2021-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3334 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17460352 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/460352
Semiconductor package with improved board level reliability Aug 29, 2021 Issued
Array ( [id] => 17448270 [patent_doc_number] => 20220068775 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-03-03 [patent_title] => BENDING SEMICONDUCTOR CHIP FOR CONNECTION AT DIFFERENT VERTICAL LEVELS [patent_app_type] => utility [patent_app_number] => 17/411633 [patent_app_country] => US [patent_app_date] => 2021-08-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8532 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17411633 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/411633
Bending semiconductor chip for connection at different vertical levels Aug 24, 2021 Issued
Array ( [id] => 17448236 [patent_doc_number] => 20220068741 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-03-03 [patent_title] => METHOD OF MANUFACTURING SEMICONDUCTOR DEVICES AND CORRESPONDING DEVICE [patent_app_type] => utility [patent_app_number] => 17/411585 [patent_app_country] => US [patent_app_date] => 2021-08-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5038 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -21 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17411585 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/411585
Method of manufacturing semiconductor devices and corresponding device Aug 24, 2021 Issued
Array ( [id] => 17431660 [patent_doc_number] => 20220059369 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-02-24 [patent_title] => METHOD OF MANUFACTURING SEMICONDUCTOR DEVICES, AND CORRESPONDING TOOL [patent_app_type] => utility [patent_app_number] => 17/407612 [patent_app_country] => US [patent_app_date] => 2021-08-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4792 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17407612 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/407612
METHOD OF MANUFACTURING SEMICONDUCTOR DEVICES, AND CORRESPONDING TOOL Aug 19, 2021 Abandoned
Array ( [id] => 18507517 [patent_doc_number] => 11705344 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-07-18 [patent_title] => Method of manufacturing a resin-sealed semiconductor device [patent_app_type] => utility [patent_app_number] => 17/405550 [patent_app_country] => US [patent_app_date] => 2021-08-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 21 [patent_no_of_words] => 8876 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 238 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17405550 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/405550
Method of manufacturing a resin-sealed semiconductor device Aug 17, 2021 Issued
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