Search

Dilinh P. Nguyen

Examiner (ID: 17194, Phone: (571)272-1712 , Office: P/2893 )

Most Active Art Unit
2893
Art Unit(s)
2894, 2818, 2893, 2814
Total Applications
984
Issued Applications
760
Pending Applications
22
Abandoned Applications
204

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 16645777 [patent_doc_number] => 10923645 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-02-16 [patent_title] => Light source device having package including first electrode and second electrode and substrate including wiring members facing first electrode and second electrode [patent_app_type] => utility [patent_app_number] => 16/710309 [patent_app_country] => US [patent_app_date] => 2019-12-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 11 [patent_no_of_words] => 8127 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 164 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16710309 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/710309
Light source device having package including first electrode and second electrode and substrate including wiring members facing first electrode and second electrode Dec 10, 2019 Issued
Array ( [id] => 16738961 [patent_doc_number] => 10964627 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-03-30 [patent_title] => Integrated electronic device having a dissipative package, in particular dual side cooling package [patent_app_type] => utility [patent_app_number] => 16/696698 [patent_app_country] => US [patent_app_date] => 2019-11-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 12 [patent_no_of_words] => 3138 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 148 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16696698 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/696698
Integrated electronic device having a dissipative package, in particular dual side cooling package Nov 25, 2019 Issued
Array ( [id] => 15656909 [patent_doc_number] => 20200090985 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-03-19 [patent_title] => SELF-ALIGNED PATTERN FORMATION FOR A SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 16/693668 [patent_app_country] => US [patent_app_date] => 2019-11-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3229 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16693668 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/693668
Self-aligned pattern formation for a semiconductor device Nov 24, 2019 Issued
Array ( [id] => 17925886 [patent_doc_number] => 11469148 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-10-11 [patent_title] => Semiconductor package having a redistribution layer for package-on-package structure [patent_app_type] => utility [patent_app_number] => 16/681341 [patent_app_country] => US [patent_app_date] => 2019-11-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 29 [patent_no_of_words] => 11802 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 241 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16681341 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/681341
Semiconductor package having a redistribution layer for package-on-package structure Nov 11, 2019 Issued
Array ( [id] => 15955177 [patent_doc_number] => 10665502 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-05-26 [patent_title] => Semiconductor device with an interconnection layer and method of manufacturing the same [patent_app_type] => utility [patent_app_number] => 16/592869 [patent_app_country] => US [patent_app_date] => 2019-10-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 19 [patent_no_of_words] => 14391 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 401 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16592869 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/592869
Semiconductor device with an interconnection layer and method of manufacturing the same Oct 3, 2019 Issued
Array ( [id] => 18520810 [patent_doc_number] => 11710705 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-07-25 [patent_title] => Semiconductor device and method for manufacturing semiconductor device [patent_app_type] => utility [patent_app_number] => 17/278801 [patent_app_country] => US [patent_app_date] => 2019-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 33 [patent_no_of_words] => 18852 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 185 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17278801 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/278801
Semiconductor device and method for manufacturing semiconductor device Sep 29, 2019 Issued
Array ( [id] => 16729021 [patent_doc_number] => 20210096168 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-04-01 [patent_title] => BALL GRID ARRAY CURRENT METER WITH A CURRENT SENSE WIRE [patent_app_type] => utility [patent_app_number] => 16/583464 [patent_app_country] => US [patent_app_date] => 2019-09-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7826 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16583464 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/583464
Ball grid array current meter with a current sense wire Sep 25, 2019 Issued
Array ( [id] => 18670033 [patent_doc_number] => 11776945 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-10-03 [patent_title] => Package-on-package structure including a thermal isolation material [patent_app_type] => utility [patent_app_number] => 16/580617 [patent_app_country] => US [patent_app_date] => 2019-09-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2579 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16580617 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/580617
Package-on-package structure including a thermal isolation material Sep 23, 2019 Issued
Array ( [id] => 16356465 [patent_doc_number] => 10796983 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-10-06 [patent_title] => Positional relationship among components of semiconductor device [patent_app_type] => utility [patent_app_number] => 16/577596 [patent_app_country] => US [patent_app_date] => 2019-09-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 31 [patent_no_of_words] => 9473 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 660 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16577596 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/577596
Positional relationship among components of semiconductor device Sep 19, 2019 Issued
Array ( [id] => 15331793 [patent_doc_number] => 20200006226 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-01-02 [patent_title] => Techniques to Improve Reliability in Cu Interconnects Using Cu Intermetallics [patent_app_type] => utility [patent_app_number] => 16/569997 [patent_app_country] => US [patent_app_date] => 2019-09-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5303 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 41 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16569997 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/569997
Techniques to improve reliability in Cu interconnects using Cu intermetallics Sep 12, 2019 Issued
Array ( [id] => 16684372 [patent_doc_number] => 10943863 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-03-09 [patent_title] => Techniques to improve reliability in Cu interconnects using Cu intermetallics [patent_app_type] => utility [patent_app_number] => 16/570037 [patent_app_country] => US [patent_app_date] => 2019-09-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 5308 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 200 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16570037 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/570037
Techniques to improve reliability in Cu interconnects using Cu intermetallics Sep 12, 2019 Issued
Array ( [id] => 15955253 [patent_doc_number] => 10665541 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-05-26 [patent_title] => Biconvex low resistance metal wire [patent_app_type] => utility [patent_app_number] => 16/555572 [patent_app_country] => US [patent_app_date] => 2019-08-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 12 [patent_no_of_words] => 6380 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 333 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16555572 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/555572
Biconvex low resistance metal wire Aug 28, 2019 Issued
Array ( [id] => 17908636 [patent_doc_number] => 11462498 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-10-04 [patent_title] => Semiconductor package including frame in which semiconductor chip is embedded [patent_app_type] => utility [patent_app_number] => 16/554278 [patent_app_country] => US [patent_app_date] => 2019-08-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 16 [patent_no_of_words] => 10674 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 193 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16554278 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/554278
Semiconductor package including frame in which semiconductor chip is embedded Aug 27, 2019 Issued
Array ( [id] => 16119855 [patent_doc_number] => 20200211950 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-07-02 [patent_title] => HIGH-PERFORMANCE INTEGRATED CIRCUIT PACKAGING PLATFORM COMPATIBLE WITH SURFACE MOUNT ASSEMBLY [patent_app_type] => utility [patent_app_number] => 16/552055 [patent_app_country] => US [patent_app_date] => 2019-08-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7383 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16552055 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/552055
High-performance integrated circuit packaging platform compatible with surface mount assembly Aug 26, 2019 Issued
Array ( [id] => 16873518 [patent_doc_number] => 20210166985 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-06-03 [patent_title] => PACKAGE STRUCTURE, SEMICONDUCTOR DEVICE, AND FORMATION METHOD FOR PACKAGE STRUCTURE [patent_app_type] => utility [patent_app_number] => 17/268018 [patent_app_country] => US [patent_app_date] => 2019-08-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 17538 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17268018 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/268018
Package structure, semiconductor device, and formation method for package structure Aug 22, 2019 Issued
Array ( [id] => 19524140 [patent_doc_number] => 12125881 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-10-22 [patent_title] => Silicon carbide epitaxial substrate and silicon carbide semiconductor device [patent_app_type] => utility [patent_app_number] => 17/274859 [patent_app_country] => US [patent_app_date] => 2019-08-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 12021 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 395 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17274859 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/274859
Silicon carbide epitaxial substrate and silicon carbide semiconductor device Aug 7, 2019 Issued
Array ( [id] => 18088596 [patent_doc_number] => 11538735 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-12-27 [patent_title] => Method of forming integrated circuit packages with mechanical braces [patent_app_type] => utility [patent_app_number] => 16/529023 [patent_app_country] => US [patent_app_date] => 2019-08-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 25 [patent_no_of_words] => 7981 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16529023 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/529023
Method of forming integrated circuit packages with mechanical braces Jul 31, 2019 Issued
Array ( [id] => 17956363 [patent_doc_number] => 11482476 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-10-25 [patent_title] => Power semiconductor device with an element installation conductor [patent_app_type] => utility [patent_app_number] => 17/273620 [patent_app_country] => US [patent_app_date] => 2019-07-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4373 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 153 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17273620 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/273620
Power semiconductor device with an element installation conductor Jul 25, 2019 Issued
Array ( [id] => 17439252 [patent_doc_number] => 11264593 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-03-01 [patent_title] => Flexible display device [patent_app_type] => utility [patent_app_number] => 16/516965 [patent_app_country] => US [patent_app_date] => 2019-07-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 3256 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16516965 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/516965
Flexible display device Jul 18, 2019 Issued
Array ( [id] => 16272294 [patent_doc_number] => 20200273782 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-08-27 [patent_title] => SEMICONDUCTOR PACKAGE WITH HEATSINK [patent_app_type] => utility [patent_app_number] => 16/506405 [patent_app_country] => US [patent_app_date] => 2019-07-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15421 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 68 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16506405 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/506405
Semiconductor package with heatsink Jul 8, 2019 Issued
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