
Dinh X. Nguyen
Examiner (ID: 14225)
| Most Active Art Unit | 3738 |
| Art Unit(s) | 3738, 3626 |
| Total Applications | 343 |
| Issued Applications | 250 |
| Pending Applications | 67 |
| Abandoned Applications | 26 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 11614300
[patent_doc_number] => 09652156
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2017-05-16
[patent_title] => 'Host read command return reordering based on time estimation of flash read command completion'
[patent_app_type] => utility
[patent_app_number] => 15/154418
[patent_app_country] => US
[patent_app_date] => 2016-05-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 5931
[patent_no_of_claims] => 24
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 109
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15154418
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/154418 | Host read command return reordering based on time estimation of flash read command completion | May 12, 2016 | Issued |
Array
(
[id] => 12713335
[patent_doc_number] => 20180129611
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2018-05-10
[patent_title] => DATA PROCESSING APPARATUS AND METHOD WITH OWNERSHIP TABLE
[patent_app_type] => utility
[patent_app_number] => 15/574596
[patent_app_country] => US
[patent_app_date] => 2016-04-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 15576
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -28
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15574596
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/574596 | Apparatus and method including an ownership table for indicating owner processes for blocks of physical addresses of a memory | Apr 27, 2016 | Issued |
Array
(
[id] => 11034976
[patent_doc_number] => 20160231932
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2016-08-11
[patent_title] => 'HOST CONTROLLED ENABLEMENT OF AUTOMATIC BACKGROUND OPERATIONS IN A MEMORY DEVICE'
[patent_app_type] => utility
[patent_app_number] => 15/131447
[patent_app_country] => US
[patent_app_date] => 2016-04-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 3769
[patent_no_of_claims] => 24
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15131447
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/131447 | Host controlled enablement of automatic background operations in a memory device | Apr 17, 2016 | Issued |
Array
(
[id] => 11651316
[patent_doc_number] => 20170147217
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2017-05-25
[patent_title] => 'DATA ALLOCATING METHOD AND ELECTRIC SYSTEM USING THE SAME'
[patent_app_type] => utility
[patent_app_number] => 15/093841
[patent_app_country] => US
[patent_app_date] => 2016-04-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 5862
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15093841
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/093841 | Data allocating method and electric system using the same | Apr 7, 2016 | Issued |
Array
(
[id] => 11853670
[patent_doc_number] => 20170228162
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2017-08-10
[patent_title] => 'MEMORY MANAGEMENT METHOD, MEMORY CONTROL CIRCUIT UNIT AND MEMORY STORAGE DEVICE'
[patent_app_type] => utility
[patent_app_number] => 15/093755
[patent_app_country] => US
[patent_app_date] => 2016-04-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 11132
[patent_no_of_claims] => 27
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15093755
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/093755 | Memory management method, memory control circuit unit and memory storage device | Apr 7, 2016 | Issued |
Array
(
[id] => 11938433
[patent_doc_number] => 20170242583
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2017-08-24
[patent_title] => 'MEMORY DEVICE HAVING A TRANSLATION LAYER WITH MULTIPLE ASSOCIATIVE SECTORS'
[patent_app_type] => utility
[patent_app_number] => 15/093682
[patent_app_country] => US
[patent_app_date] => 2016-04-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 9170
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15093682
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/093682 | Memory device having a translation layer with multiple associative sectors | Apr 6, 2016 | Issued |
Array
(
[id] => 11989280
[patent_doc_number] => 20170293434
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2017-10-12
[patent_title] => 'SPAN MASK GENERATION'
[patent_app_type] => utility
[patent_app_number] => 15/093448
[patent_app_country] => US
[patent_app_date] => 2016-04-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 12
[patent_no_of_words] => 20833
[patent_no_of_claims] => 31
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15093448
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/093448 | Span mask generation | Apr 6, 2016 | Issued |
Array
(
[id] => 11989292
[patent_doc_number] => 20170293447
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2017-10-12
[patent_title] => 'Multi-tenant memory service for memory pool architectures'
[patent_app_type] => utility
[patent_app_number] => 15/092699
[patent_app_country] => US
[patent_app_date] => 2016-04-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 10978
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 7
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15092699
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/092699 | Multi-tenant memory service for memory pool architectures | Apr 6, 2016 | Issued |
Array
(
[id] => 11989281
[patent_doc_number] => 20170293436
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2017-10-12
[patent_title] => 'PARALLEL READ AND WRITES IN 3D FLASH MEMORY'
[patent_app_type] => utility
[patent_app_number] => 15/093372
[patent_app_country] => US
[patent_app_date] => 2016-04-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 5565
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15093372
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/093372 | Parallel read and writes in 3D flash memory | Apr 6, 2016 | Issued |
Array
(
[id] => 12201558
[patent_doc_number] => 09904624
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2018-02-27
[patent_title] => 'Prefetch throttling in a multi-core system'
[patent_app_type] => utility
[patent_app_number] => 15/093173
[patent_app_country] => US
[patent_app_date] => 2016-04-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 7
[patent_no_of_words] => 11206
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 215
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15093173
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/093173 | Prefetch throttling in a multi-core system | Apr 6, 2016 | Issued |
Array
(
[id] => 11989269
[patent_doc_number] => 20170293425
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2017-10-12
[patent_title] => 'DELAYING PROGRAMMING REQUESTS IN FLASH MEMORY'
[patent_app_type] => utility
[patent_app_number] => 15/093243
[patent_app_country] => US
[patent_app_date] => 2016-04-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 5585
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15093243
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/093243 | Delaying programming requests in flash memory | Apr 6, 2016 | Issued |
Array
(
[id] => 13807277
[patent_doc_number] => 10180905
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2019-01-15
[patent_title] => Unified prefetch circuit for multi-level caches
[patent_app_type] => utility
[patent_app_number] => 15/093213
[patent_app_country] => US
[patent_app_date] => 2016-04-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 10
[patent_no_of_words] => 10841
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 274
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15093213
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/093213 | Unified prefetch circuit for multi-level caches | Apr 6, 2016 | Issued |
Array
(
[id] => 11989401
[patent_doc_number] => 20170293556
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2017-10-12
[patent_title] => 'READ DISCARDS IN A PROCESSOR SYSTEM WITH WRITE-BACK CACHES'
[patent_app_type] => utility
[patent_app_number] => 15/093404
[patent_app_country] => US
[patent_app_date] => 2016-04-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 7231
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15093404
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/093404 | READ DISCARDS IN A PROCESSOR SYSTEM WITH WRITE-BACK CACHES | Apr 6, 2016 | Abandoned |
Array
(
[id] => 16032103
[patent_doc_number] => 10678470
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2020-06-09
[patent_title] => Computer system,control method for physical storage device,and recording medium
[patent_app_type] => utility
[patent_app_number] => 16/081389
[patent_app_country] => US
[patent_app_date] => 2016-04-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 28
[patent_figures_cnt] => 32
[patent_no_of_words] => 18495
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 269
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16081389
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/081389 | Computer system,control method for physical storage device,and recording medium | Apr 4, 2016 | Issued |
Array
(
[id] => 13891325
[patent_doc_number] => 10198209
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2019-02-05
[patent_title] => Memory storage recycling
[patent_app_type] => utility
[patent_app_number] => 15/087301
[patent_app_country] => US
[patent_app_date] => 2016-03-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 7125
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 185
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15087301
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/087301 | Memory storage recycling | Mar 30, 2016 | Issued |
Array
(
[id] => 11981859
[patent_doc_number] => 20170286013
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2017-10-05
[patent_title] => 'METHOD AND SYSTEM FOR OPTIMISTIC FLOW CONTROL FOR PUSH-BASED INPUT/OUTPUT WITH BUFFER STEALING'
[patent_app_type] => utility
[patent_app_number] => 15/087727
[patent_app_country] => US
[patent_app_date] => 2016-03-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 13
[patent_no_of_words] => 6825
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15087727
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/087727 | Method and system for optimistic flow control for push-based input/output with buffer stealing | Mar 30, 2016 | Issued |
Array
(
[id] => 10991293
[patent_doc_number] => 20160188238
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2016-06-30
[patent_title] => 'METHODS FOR SYNCHRONIZING STORAGE SYSTEM DATA'
[patent_app_type] => utility
[patent_app_number] => 15/062906
[patent_app_country] => US
[patent_app_date] => 2016-03-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 8806
[patent_no_of_claims] => 30
[patent_no_of_ind_claims] => 6
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15062906
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/062906 | Methods for synchronizing storage system data | Mar 6, 2016 | Issued |
Array
(
[id] => 11359187
[patent_doc_number] => 09535840
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2017-01-03
[patent_title] => 'Parallel destaging with replicated cache pinning'
[patent_app_type] => utility
[patent_app_number] => 15/047237
[patent_app_country] => US
[patent_app_date] => 2016-02-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 7332
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 114
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15047237
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/047237 | Parallel destaging with replicated cache pinning | Feb 17, 2016 | Issued |
Array
(
[id] => 11806378
[patent_doc_number] => 09547446
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2017-01-17
[patent_title] => 'Fine-grained control of data placement'
[patent_app_type] => utility
[patent_app_number] => 15/047593
[patent_app_country] => US
[patent_app_date] => 2016-02-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 7034
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 92
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15047593
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/047593 | Fine-grained control of data placement | Feb 17, 2016 | Issued |
Array
(
[id] => 11830521
[patent_doc_number] => 09727263
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2017-08-08
[patent_title] => 'Method and system for storage of data in a non-volatile media'
[patent_app_type] => utility
[patent_app_number] => 15/046182
[patent_app_country] => US
[patent_app_date] => 2016-02-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 23
[patent_figures_cnt] => 30
[patent_no_of_words] => 21558
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 166
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15046182
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/046182 | Method and system for storage of data in a non-volatile media | Feb 16, 2016 | Issued |