
Dinku W. Gebresenbet
Examiner (ID: 6582, Phone: (571)270-1636 , Office: P/2164 )
| Most Active Art Unit | 2164 |
| Art Unit(s) | 2164 |
| Total Applications | 651 |
| Issued Applications | 441 |
| Pending Applications | 41 |
| Abandoned Applications | 183 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 16609507
[patent_doc_number] => 10910523
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2021-02-02
[patent_title] => Light emitting device
[patent_app_type] => utility
[patent_app_number] => 16/004445
[patent_app_country] => US
[patent_app_date] => 2018-06-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 25
[patent_figures_cnt] => 59
[patent_no_of_words] => 14507
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 168
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16004445
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/004445 | Light emitting device | Jun 10, 2018 | Issued |
Array
(
[id] => 14163849
[patent_doc_number] => 20190109027
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2019-04-11
[patent_title] => MICRO-LED PICK AND PLACE USING METALLIC GALLIUM
[patent_app_type] => utility
[patent_app_number] => 16/002640
[patent_app_country] => US
[patent_app_date] => 2018-06-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6596
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -13
[patent_words_short_claim] => 80
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16002640
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/002640 | Micro-LED pick and place using metallic gallium | Jun 6, 2018 | Issued |
Array
(
[id] => 13452031
[patent_doc_number] => 20180277558
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2018-09-27
[patent_title] => SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME
[patent_app_type] => utility
[patent_app_number] => 15/994575
[patent_app_country] => US
[patent_app_date] => 2018-05-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8316
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -12
[patent_words_short_claim] => 78
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15994575
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/994575 | Semiconductor device and method of manufacturing the same | May 30, 2018 | Issued |
Array
(
[id] => 13451771
[patent_doc_number] => 20180277428
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2018-09-27
[patent_title] => Doping Control of Metal Nitride Films
[patent_app_type] => utility
[patent_app_number] => 15/989635
[patent_app_country] => US
[patent_app_date] => 2018-05-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5564
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 63
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15989635
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/989635 | Doping control of metal nitride films | May 24, 2018 | Issued |
Array
(
[id] => 16067833
[patent_doc_number] => 10692881
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2020-06-23
[patent_title] => Semiconductor memory device and method of manufacturing the same
[patent_app_type] => utility
[patent_app_number] => 15/982213
[patent_app_country] => US
[patent_app_date] => 2018-05-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 47
[patent_figures_cnt] => 52
[patent_no_of_words] => 16792
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 116
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15982213
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/982213 | Semiconductor memory device and method of manufacturing the same | May 16, 2018 | Issued |
Array
(
[id] => 14261907
[patent_doc_number] => 10280507
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2019-05-07
[patent_title] => Flowable gapfill using solvents
[patent_app_type] => utility
[patent_app_number] => 15/978930
[patent_app_country] => US
[patent_app_date] => 2018-05-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 15
[patent_no_of_words] => 8229
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 149
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15978930
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/978930 | Flowable gapfill using solvents | May 13, 2018 | Issued |
Array
(
[id] => 13558807
[patent_doc_number] => 20180330951
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2018-11-15
[patent_title] => DEPOSITION OF METAL SILICIDE LAYERS ON SUBSTRATES AND CHAMBER COMPONENTS
[patent_app_type] => utility
[patent_app_number] => 15/977388
[patent_app_country] => US
[patent_app_date] => 2018-05-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6220
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 56
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15977388
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/977388 | Deposition of metal silicide layers on substrates and chamber components | May 10, 2018 | Issued |
Array
(
[id] => 14738203
[patent_doc_number] => 10388511
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2019-08-20
[patent_title] => Method of forming silicon nitride film, film forming apparatus and storage medium
[patent_app_type] => utility
[patent_app_number] => 15/977480
[patent_app_country] => US
[patent_app_date] => 2018-05-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 15
[patent_no_of_words] => 5849
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 229
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15977480
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/977480 | Method of forming silicon nitride film, film forming apparatus and storage medium | May 10, 2018 | Issued |
Array
(
[id] => 13558865
[patent_doc_number] => 20180330980
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2018-11-15
[patent_title] => CYCLIC FLOWABLE DEPOSITION AND HIGH-DENSITY PLASMA TREATMENT PROCESSES FOR HIGH QUALITY GAP FILL SOLUTIONS
[patent_app_type] => utility
[patent_app_number] => 15/977380
[patent_app_country] => US
[patent_app_date] => 2018-05-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5964
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 91
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15977380
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/977380 | Cyclic flowable deposition and high-density plasma treatment processes for high quality gap fill solutions | May 10, 2018 | Issued |
Array
(
[id] => 14920647
[patent_doc_number] => 10431651
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2019-10-01
[patent_title] => Nanosheet transistor with robust source/drain isolation from substrate
[patent_app_type] => utility
[patent_app_number] => 15/967524
[patent_app_country] => US
[patent_app_date] => 2018-04-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 12
[patent_no_of_words] => 9091
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 161
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15967524
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/967524 | Nanosheet transistor with robust source/drain isolation from substrate | Apr 29, 2018 | Issued |
Array
(
[id] => 13392695
[patent_doc_number] => 20180247890
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2018-08-30
[patent_title] => Semiconductor Structure and Manufacturing Method Thereof
[patent_app_type] => utility
[patent_app_number] => 15/964453
[patent_app_country] => US
[patent_app_date] => 2018-04-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5569
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 86
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15964453
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/964453 | Semiconductor structure and manufacturing method thereof | Apr 26, 2018 | Issued |
Array
(
[id] => 15030485
[patent_doc_number] => 20190326247
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2019-10-24
[patent_title] => BOND WIRE SUPPORT SYSTEMS AND METHODS
[patent_app_type] => utility
[patent_app_number] => 15/960093
[patent_app_country] => US
[patent_app_date] => 2018-04-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5444
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -20
[patent_words_short_claim] => 76
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15960093
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/960093 | Bond wire support systems and methods | Apr 22, 2018 | Issued |
Array
(
[id] => 16536599
[patent_doc_number] => 10879212
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2020-12-29
[patent_title] => Processed stacked dies
[patent_app_type] => utility
[patent_app_number] => 15/960179
[patent_app_country] => US
[patent_app_date] => 2018-04-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 10
[patent_no_of_words] => 7231
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 88
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15960179
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/960179 | Processed stacked dies | Apr 22, 2018 | Issued |
Array
(
[id] => 16280263
[patent_doc_number] => 10763304
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2020-09-01
[patent_title] => Semiconductor structure and method of forming the same
[patent_app_type] => utility
[patent_app_number] => 15/960238
[patent_app_country] => US
[patent_app_date] => 2018-04-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 25
[patent_figures_cnt] => 25
[patent_no_of_words] => 8200
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 120
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15960238
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/960238 | Semiconductor structure and method of forming the same | Apr 22, 2018 | Issued |
Array
(
[id] => 15030479
[patent_doc_number] => 20190326244
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2019-10-24
[patent_title] => SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOF
[patent_app_type] => utility
[patent_app_number] => 15/960222
[patent_app_country] => US
[patent_app_date] => 2018-04-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6004
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 102
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15960222
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/960222 | Semiconductor structure and manufacturing method thereof | Apr 22, 2018 | Issued |
Array
(
[id] => 15030427
[patent_doc_number] => 20190326218
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2019-10-24
[patent_title] => 3D NAND WORD LINE CONNECTION STRUCTURE
[patent_app_type] => utility
[patent_app_number] => 15/960106
[patent_app_country] => US
[patent_app_date] => 2018-04-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7428
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 157
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15960106
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/960106 | 3D NAND world line connection structure | Apr 22, 2018 | Issued |
Array
(
[id] => 13363743
[patent_doc_number] => 20180233411
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2018-08-16
[patent_title] => SEMICONDUCTOR DIE SINGULATION METHODS
[patent_app_type] => utility
[patent_app_number] => 15/955581
[patent_app_country] => US
[patent_app_date] => 2018-04-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6394
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 163
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15955581
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/955581 | Semiconductor die singulation methods | Apr 16, 2018 | Issued |
Array
(
[id] => 14969073
[patent_doc_number] => 20190312015
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2019-10-10
[patent_title] => LED BACKPLANE HAVING PLANAR BONDING SURFACES AND METHOD OF MAKING THEREOF
[patent_app_type] => utility
[patent_app_number] => 15/949514
[patent_app_country] => US
[patent_app_date] => 2018-04-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 9023
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 156
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15949514
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/949514 | LED backplane having planar bonding surfaces and method of making thereof | Apr 9, 2018 | Issued |
Array
(
[id] => 16132811
[patent_doc_number] => 10700173
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2020-06-30
[patent_title] => FinFET device with a wrap-around silicide source/drain contact structure
[patent_app_type] => utility
[patent_app_number] => 15/949730
[patent_app_country] => US
[patent_app_date] => 2018-04-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 15
[patent_figures_cnt] => 16
[patent_no_of_words] => 5963
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 122
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15949730
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/949730 | FinFET device with a wrap-around silicide source/drain contact structure | Apr 9, 2018 | Issued |
Array
(
[id] => 16280184
[patent_doc_number] => 10763225
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2020-09-01
[patent_title] => Antenna module
[patent_app_type] => utility
[patent_app_number] => 15/949439
[patent_app_country] => US
[patent_app_date] => 2018-04-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 26
[patent_figures_cnt] => 38
[patent_no_of_words] => 9381
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 132
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15949439
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/949439 | Antenna module | Apr 9, 2018 | Issued |