Search

Dinku W. Gebresenbet

Examiner (ID: 6582, Phone: (571)270-1636 , Office: P/2164 )

Most Active Art Unit
2164
Art Unit(s)
2164
Total Applications
651
Issued Applications
441
Pending Applications
41
Abandoned Applications
183

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 14204921 [patent_doc_number] => 10269581 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-04-23 [patent_title] => Method of fabricating a semiconductor structure [patent_app_type] => utility [patent_app_number] => 15/722405 [patent_app_country] => US [patent_app_date] => 2017-10-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 17 [patent_no_of_words] => 4448 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 158 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15722405 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/722405
Method of fabricating a semiconductor structure Oct 1, 2017 Issued
Array ( [id] => 13071055 [patent_doc_number] => 10056312 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-08-21 [patent_title] => Integrated circuit packages and methods for forming the same [patent_app_type] => utility [patent_app_number] => 15/722472 [patent_app_country] => US [patent_app_date] => 2017-10-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 3014 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 74 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15722472 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/722472
Integrated circuit packages and methods for forming the same Oct 1, 2017 Issued
Array ( [id] => 17745792 [patent_doc_number] => 11393874 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-07-19 [patent_title] => Independently scaling selector and memory in memory cell [patent_app_type] => utility [patent_app_number] => 16/635948 [patent_app_country] => US [patent_app_date] => 2017-09-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 22 [patent_no_of_words] => 8595 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16635948 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/635948
Independently scaling selector and memory in memory cell Sep 28, 2017 Issued
Array ( [id] => 16194313 [patent_doc_number] => 20200235162 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-07-23 [patent_title] => DOUBLE SELECTOR ELEMENT FOR LOW VOLTAGE BIPOLAR MEMORY DEVICES [patent_app_type] => utility [patent_app_number] => 16/632065 [patent_app_country] => US [patent_app_date] => 2017-09-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10216 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16632065 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/632065
Double selector element for low voltage bipolar memory devices Sep 26, 2017 Issued
Array ( [id] => 13019029 [patent_doc_number] => 10032630 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2018-07-24 [patent_title] => Method of manufacturing semiconductor device [patent_app_type] => utility [patent_app_number] => 15/710414 [patent_app_country] => US [patent_app_date] => 2017-09-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 14 [patent_no_of_words] => 10645 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 167 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15710414 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/710414
Method of manufacturing semiconductor device Sep 19, 2017 Issued
Array ( [id] => 14617019 [patent_doc_number] => 10361216 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-07-23 [patent_title] => Methods used in forming an array of elevationally-extending transistors [patent_app_type] => utility [patent_app_number] => 15/710432 [patent_app_country] => US [patent_app_date] => 2017-09-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 26 [patent_no_of_words] => 6212 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15710432 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/710432
Methods used in forming an array of elevationally-extending transistors Sep 19, 2017 Issued
Array ( [id] => 15984537 [patent_doc_number] => 10672604 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-06-02 [patent_title] => Metal oxide-resistive memory using two-dimensional edge electrodes [patent_app_type] => utility [patent_app_number] => 15/710117 [patent_app_country] => US [patent_app_date] => 2017-09-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 34 [patent_no_of_words] => 5690 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 143 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15710117 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/710117
Metal oxide-resistive memory using two-dimensional edge electrodes Sep 19, 2017 Issued
Array ( [id] => 13819551 [patent_doc_number] => 10186549 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2019-01-22 [patent_title] => Gang bonding process for assembling a matrix of light-emitting elements [patent_app_type] => utility [patent_app_number] => 15/710019 [patent_app_country] => US [patent_app_date] => 2017-09-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 22 [patent_no_of_words] => 5324 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 136 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15710019 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/710019
Gang bonding process for assembling a matrix of light-emitting elements Sep 19, 2017 Issued
Array ( [id] => 16180508 [patent_doc_number] => 20200227477 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-07-16 [patent_title] => SELECTOR ELEMENT WITH BALLAST FOR LOW VOLTAGE BIPOLAR MEMORY DEVICES [patent_app_type] => utility [patent_app_number] => 16/631156 [patent_app_country] => US [patent_app_date] => 2017-09-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9813 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 62 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16631156 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/631156
Selector element with ballast for low voltage bipolar memory devices Sep 12, 2017 Issued
Array ( [id] => 14587963 [patent_doc_number] => 20190221590 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-07-18 [patent_title] => ACTIVE MATRIX SUBSTRATE AND DISPLAY DEVICE PROVIDED WITH ACTIVE MATRIX SUBSTRATE [patent_app_type] => utility [patent_app_number] => 16/329784 [patent_app_country] => US [patent_app_date] => 2017-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 17390 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 276 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16329784 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/329784
Active matrix substrate and display device provided with active matrix substrate Aug 30, 2017 Issued
Array ( [id] => 14688157 [patent_doc_number] => 20190243194 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-08-08 [patent_title] => ACTIVE MATRIX SUBSTRATE AND METHOD FOR MANUFACTURING SAME [patent_app_type] => utility [patent_app_number] => 16/329879 [patent_app_country] => US [patent_app_date] => 2017-08-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8890 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -10 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16329879 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/329879
ACTIVE MATRIX SUBSTRATE AND METHOD FOR MANUFACTURING SAME Aug 28, 2017 Abandoned
Array ( [id] => 14677005 [patent_doc_number] => 20190237617 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-08-01 [patent_title] => OPTOELECTRONIC COMPONENT [patent_app_type] => utility [patent_app_number] => 16/329860 [patent_app_country] => US [patent_app_date] => 2017-08-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3764 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16329860 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/329860
Optoelectronic component Aug 27, 2017 Issued
Array ( [id] => 12396210 [patent_doc_number] => 09966325 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-05-08 [patent_title] => Semiconductor die package and method of producing the package [patent_app_type] => utility [patent_app_number] => 15/686015 [patent_app_country] => US [patent_app_date] => 2017-08-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 23 [patent_no_of_words] => 6568 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 345 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15686015 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/686015
Semiconductor die package and method of producing the package Aug 23, 2017 Issued
Array ( [id] => 12223382 [patent_doc_number] => 20180061742 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-03-01 [patent_title] => 'Semiconductor Devices and Methods for Forming a Semiconductor Device' [patent_app_type] => utility [patent_app_number] => 15/685880 [patent_app_country] => US [patent_app_date] => 2017-08-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 16247 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15685880 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/685880
Semiconductor devices and methods for forming a semiconductor device Aug 23, 2017 Issued
Array ( [id] => 15078237 [patent_doc_number] => 10468620 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-11-05 [patent_title] => Lighting apparatus using organic light emitting device and method of fabricating thereof [patent_app_type] => utility [patent_app_number] => 15/685884 [patent_app_country] => US [patent_app_date] => 2017-08-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 14 [patent_no_of_words] => 11046 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15685884 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/685884
Lighting apparatus using organic light emitting device and method of fabricating thereof Aug 23, 2017 Issued
Array ( [id] => 13996179 [patent_doc_number] => 20190067247 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-02-28 [patent_title] => DUAL SIDED FAN-OUT PACKAGE HAVING LOW WARPAGE ACROSS ALL TEMPERATURES [patent_app_type] => utility [patent_app_number] => 15/686024 [patent_app_country] => US [patent_app_date] => 2017-08-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7372 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15686024 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/686024
Dual sided fan-out package having low warpage across all temperatures Aug 23, 2017 Issued
Array ( [id] => 15061703 [patent_doc_number] => 10461164 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-10-29 [patent_title] => Compound semiconductor field effect transistor with self-aligned gate [patent_app_type] => utility [patent_app_number] => 15/685877 [patent_app_country] => US [patent_app_date] => 2017-08-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 24 [patent_no_of_words] => 10552 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 174 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15685877 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/685877
Compound semiconductor field effect transistor with self-aligned gate Aug 23, 2017 Issued
Array ( [id] => 12553872 [patent_doc_number] => 10014180 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2018-07-03 [patent_title] => Tungsten gate and method for forming [patent_app_type] => utility [patent_app_number] => 15/681654 [patent_app_country] => US [patent_app_date] => 2017-08-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4191 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 78 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15681654 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/681654
Tungsten gate and method for forming Aug 20, 2017 Issued
Array ( [id] => 14151573 [patent_doc_number] => 10256175 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-04-09 [patent_title] => Printed wiring board and method for manufacturing printed wiring board [patent_app_type] => utility [patent_app_number] => 15/681695 [patent_app_country] => US [patent_app_date] => 2017-08-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 25 [patent_no_of_words] => 11383 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 201 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15681695 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/681695
Printed wiring board and method for manufacturing printed wiring board Aug 20, 2017 Issued
Array ( [id] => 14125329 [patent_doc_number] => 10249528 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-04-02 [patent_title] => Integrated circuit and manufacturing method thereof [patent_app_type] => utility [patent_app_number] => 15/681419 [patent_app_country] => US [patent_app_date] => 2017-08-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 4875 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 178 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15681419 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/681419
Integrated circuit and manufacturing method thereof Aug 19, 2017 Issued
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