Search

Dinku W. Gebresenbet

Examiner (ID: 6582, Phone: (571)270-1636 , Office: P/2164 )

Most Active Art Unit
2164
Art Unit(s)
2164
Total Applications
651
Issued Applications
441
Pending Applications
41
Abandoned Applications
183

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 8884201 [patent_doc_number] => 20130157385 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-06-20 [patent_title] => 'METHOD FOR FABRICATING SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 13/529306 [patent_app_country] => US [patent_app_date] => 2012-06-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4117 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13529306 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/529306
METHOD FOR FABRICATING SEMICONDUCTOR DEVICE Jun 20, 2012 Abandoned
Array ( [id] => 9831795 [patent_doc_number] => 08940608 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-01-27 [patent_title] => 'Methods for fabricating integrated circuits with drift regions and replacement gates' [patent_app_type] => utility [patent_app_number] => 13/529898 [patent_app_country] => US [patent_app_date] => 2012-06-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 2432 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 231 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13529898 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/529898
Methods for fabricating integrated circuits with drift regions and replacement gates Jun 20, 2012 Issued
Array ( [id] => 8566681 [patent_doc_number] => 20120329252 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-12-27 [patent_title] => 'SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME' [patent_app_type] => utility [patent_app_number] => 13/529564 [patent_app_country] => US [patent_app_date] => 2012-06-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5697 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13529564 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/529564
SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME Jun 20, 2012 Abandoned
Array ( [id] => 10165302 [patent_doc_number] => 09196532 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-11-24 [patent_title] => 'Integrated circuit packages and methods for forming the same' [patent_app_type] => utility [patent_app_number] => 13/529179 [patent_app_country] => US [patent_app_date] => 2012-06-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 3021 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 159 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13529179 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/529179
Integrated circuit packages and methods for forming the same Jun 20, 2012 Issued
Array ( [id] => 8884200 [patent_doc_number] => 20130157384 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-06-20 [patent_title] => 'METHOD FOR FABRICATING SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 13/529176 [patent_app_country] => US [patent_app_date] => 2012-06-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 2338 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13529176 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/529176
METHOD FOR FABRICATING SEMICONDUCTOR DEVICE Jun 20, 2012 Abandoned
Array ( [id] => 9026448 [patent_doc_number] => 08536029 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2013-09-17 [patent_title] => 'Nanowire FET and finFET' [patent_app_type] => utility [patent_app_number] => 13/529334 [patent_app_country] => US [patent_app_date] => 2012-06-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 17 [patent_no_of_words] => 3686 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 309 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13529334 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/529334
Nanowire FET and finFET Jun 20, 2012 Issued
Array ( [id] => 9951718 [patent_doc_number] => 09000511 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-04-07 [patent_title] => 'Non-volatile memory device' [patent_app_type] => utility [patent_app_number] => 13/529621 [patent_app_country] => US [patent_app_date] => 2012-06-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 24 [patent_no_of_words] => 9560 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 165 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13529621 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/529621
Non-volatile memory device Jun 20, 2012 Issued
Array ( [id] => 9262763 [patent_doc_number] => 20130344692 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-12-26 [patent_title] => 'METHODS FOR FABRICATING INTEGRATED CIRCUITS WITH FLUORINE PASSIVATION' [patent_app_type] => utility [patent_app_number] => 13/529327 [patent_app_country] => US [patent_app_date] => 2012-06-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2326 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13529327 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/529327
Methods for fabricating integrated circuits with fluorine passivation Jun 20, 2012 Issued
Array ( [id] => 14300949 [patent_doc_number] => 10290606 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-05-14 [patent_title] => Interposer with identification system [patent_app_type] => utility [patent_app_number] => 13/529736 [patent_app_country] => US [patent_app_date] => 2012-06-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 3992 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 58 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13529736 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/529736
Interposer with identification system Jun 20, 2012 Issued
Array ( [id] => 12375465 [patent_doc_number] => 09960047 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-05-01 [patent_title] => Test pattern for trench poly over-etched step and formation method thereof [patent_app_type] => utility [patent_app_number] => 14/236473 [patent_app_country] => US [patent_app_date] => 2012-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 9 [patent_no_of_words] => 2405 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 155 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14236473 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/236473
Test pattern for trench poly over-etched step and formation method thereof Jun 6, 2012 Issued
Array ( [id] => 9655319 [patent_doc_number] => 20140226324 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-08-14 [patent_title] => 'Mixed Light Source' [patent_app_type] => utility [patent_app_number] => 14/117294 [patent_app_country] => US [patent_app_date] => 2012-05-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4485 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14117294 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/117294
Mixed light source May 3, 2012 Issued
Array ( [id] => 9937291 [patent_doc_number] => 08987096 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-03-24 [patent_title] => 'Semiconductor process' [patent_app_type] => utility [patent_app_number] => 13/367376 [patent_app_country] => US [patent_app_date] => 2012-02-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 10 [patent_no_of_words] => 3247 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13367376 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/367376
Semiconductor process Feb 6, 2012 Issued
Array ( [id] => 8960865 [patent_doc_number] => 20130200467 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-08-08 [patent_title] => 'DUAL METAL FILL AND DUAL THRESHOLD VOLTAGE FOR REPLACEMENT GATE METAL DEVICES' [patent_app_type] => utility [patent_app_number] => 13/367419 [patent_app_country] => US [patent_app_date] => 2012-02-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 3738 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13367419 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/367419
Dual metal fill and dual threshold voltage for replacement gate metal devices Feb 6, 2012 Issued
Array ( [id] => 8853659 [patent_doc_number] => 20130143334 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-06-06 [patent_title] => 'METHOD OF ENHANCING COLOR RENDERING INDEX OF A WHITE LED' [patent_app_type] => utility [patent_app_number] => 13/367144 [patent_app_country] => US [patent_app_date] => 2012-02-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4460 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13367144 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/367144
METHOD OF ENHANCING COLOR RENDERING INDEX OF A WHITE LED Feb 5, 2012 Abandoned
Array ( [id] => 8963645 [patent_doc_number] => 20130203247 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-08-08 [patent_title] => 'METHOD OF FABRICATING A SEMICONDUCTOR STRUCTURE' [patent_app_type] => utility [patent_app_number] => 13/366669 [patent_app_country] => US [patent_app_date] => 2012-02-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 3865 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13366669 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/366669
Method of fabricating a semiconductor structure with ion-implanted conductive layer Feb 5, 2012 Issued
Array ( [id] => 8335649 [patent_doc_number] => 20120202346 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-08-09 [patent_title] => 'METHOD FOR MANUFACTURING A SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 13/365479 [patent_app_country] => US [patent_app_date] => 2012-02-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 5067 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13365479 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/365479
METHOD FOR MANUFACTURING A SEMICONDUCTOR DEVICE Feb 2, 2012 Abandoned
Array ( [id] => 8347384 [patent_doc_number] => 20120208306 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-08-16 [patent_title] => 'METHOD FOR ENCAPSULATING AN ORGANIC LIGHT EMITTING DIODE' [patent_app_type] => utility [patent_app_number] => 13/366109 [patent_app_country] => US [patent_app_date] => 2012-02-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 5858 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13366109 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/366109
Method for encapsulating an organic light emitting diode Feb 2, 2012 Issued
Array ( [id] => 8916374 [patent_doc_number] => 20130177999 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-07-11 [patent_title] => 'METHODS FOR FABRICATING INTEGRATED CIRCUITS INCLUDING IN-LINE DIAGNOSTICS PERFORMED ON LOW-K DIELECTRIC LAYERS' [patent_app_type] => utility [patent_app_number] => 13/348441 [patent_app_country] => US [patent_app_date] => 2012-01-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3201 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13348441 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/348441
METHODS FOR FABRICATING INTEGRATED CIRCUITS INCLUDING IN-LINE DIAGNOSTICS PERFORMED ON LOW-K DIELECTRIC LAYERS Jan 10, 2012 Abandoned
Array ( [id] => 8788928 [patent_doc_number] => 20130105897 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-05-02 [patent_title] => 'Nanowire FET and FINFET Hybrid Technology' [patent_app_type] => utility [patent_app_number] => 13/286311 [patent_app_country] => US [patent_app_date] => 2011-11-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 4597 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13286311 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/286311
Nanowire FET and finFET hybrid technology Oct 31, 2011 Issued
Array ( [id] => 9300203 [patent_doc_number] => 08648434 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-02-11 [patent_title] => 'Magnetic memory devices' [patent_app_type] => utility [patent_app_number] => 13/236888 [patent_app_country] => US [patent_app_date] => 2011-09-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 24 [patent_no_of_words] => 11890 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13236888 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/236888
Magnetic memory devices Sep 19, 2011 Issued
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