Search

Dinku W. Gebresenbet

Examiner (ID: 6582, Phone: (571)270-1636 , Office: P/2164 )

Most Active Art Unit
2164
Art Unit(s)
2164
Total Applications
651
Issued Applications
441
Pending Applications
41
Abandoned Applications
183

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 18442240 [patent_doc_number] => 20230189536 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-06-15 [patent_title] => Programming Current Control for Artificial Intelligence (AI) Devices [patent_app_type] => utility [patent_app_number] => 17/551439 [patent_app_country] => US [patent_app_date] => 2021-12-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7265 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 68 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17551439 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/551439
Programming Current Control for Artificial Intelligence (AI) Devices Dec 14, 2021 Pending
Array ( [id] => 19952940 [patent_doc_number] => 12324328 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-06-03 [patent_title] => Display device [patent_app_type] => utility [patent_app_number] => 17/552203 [patent_app_country] => US [patent_app_date] => 2021-12-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 2332 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 241 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17552203 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/552203
Display device Dec 14, 2021 Issued
Array ( [id] => 18440222 [patent_doc_number] => 20230187517 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-06-15 [patent_title] => INTEGRATED CIRCUIT STRUCTURES HAVING DIELECTRIC ANCHOR VOID [patent_app_type] => utility [patent_app_number] => 17/551022 [patent_app_country] => US [patent_app_date] => 2021-12-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15039 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17551022 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/551022
Integrated circuit structures having dielectric anchor void Dec 13, 2021 Issued
Array ( [id] => 19552858 [patent_doc_number] => 12136570 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-11-05 [patent_title] => Graphene layer for low resistance contacts and damascene interconnects [patent_app_type] => utility [patent_app_number] => 17/550670 [patent_app_country] => US [patent_app_date] => 2021-12-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 34 [patent_no_of_words] => 12704 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 61 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17550670 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/550670
Graphene layer for low resistance contacts and damascene interconnects Dec 13, 2021 Issued
Array ( [id] => 20361761 [patent_doc_number] => 12477779 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-11-18 [patent_title] => Gate-all-around field-effect-transistor with wrap-around-channel inner spacer [patent_app_type] => utility [patent_app_number] => 17/550658 [patent_app_country] => US [patent_app_date] => 2021-12-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 1153 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 74 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17550658 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/550658
Gate-all-around field-effect-transistor with wrap-around-channel inner spacer Dec 13, 2021 Issued
Array ( [id] => 17901100 [patent_doc_number] => 20220310762 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-09-29 [patent_title] => DISPLAY PANEL, DISPLAY DEVICE INCLUDING THE SAME, AND METHOD OF MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 17/545857 [patent_app_country] => US [patent_app_date] => 2021-12-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7402 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17545857 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/545857
Display panel, display device including the same, and method of manufacturing the same Dec 7, 2021 Issued
Array ( [id] => 17660936 [patent_doc_number] => 20220181401 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-06-09 [patent_title] => DISPLAY DEVICE [patent_app_type] => utility [patent_app_number] => 17/545782 [patent_app_country] => US [patent_app_date] => 2021-12-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11102 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17545782 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/545782
DISPLAY DEVICE Dec 7, 2021 Pending
Array ( [id] => 19244591 [patent_doc_number] => 12015046 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-06-18 [patent_title] => Back-illuminated sensor with boron layer deposited using plasma atomic layer deposition [patent_app_type] => utility [patent_app_number] => 17/544413 [patent_app_country] => US [patent_app_date] => 2021-12-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 15 [patent_no_of_words] => 9907 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 163 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17544413 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/544413
Back-illuminated sensor with boron layer deposited using plasma atomic layer deposition Dec 6, 2021 Issued
Array ( [id] => 18426171 [patent_doc_number] => 20230180636 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-06-08 [patent_title] => SUPPRESSION OF VOID-FORMATION OF PCM MATERIALS [patent_app_type] => utility [patent_app_number] => 17/457750 [patent_app_country] => US [patent_app_date] => 2021-12-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3298 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17457750 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/457750
Suppression of void-formation of PCM materials Dec 5, 2021 Issued
Array ( [id] => 17833787 [patent_doc_number] => 20220271091 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-08-25 [patent_title] => VARIABLE RESISTANCE MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 17/540298 [patent_app_country] => US [patent_app_date] => 2021-12-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16494 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 137 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17540298 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/540298
Variable resistance memory device Dec 1, 2021 Issued
Array ( [id] => 18424078 [patent_doc_number] => 20230178542 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-06-08 [patent_title] => INTEGRATED CIRCUIT STRUCTURES INCLUDING ELASTROSTATIC DISCHARGE BALLASTING RESISTOR BASED ON BURIED POWER RAIL [patent_app_type] => utility [patent_app_number] => 17/540609 [patent_app_country] => US [patent_app_date] => 2021-12-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 18852 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 65 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17540609 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/540609
INTEGRATED CIRCUIT STRUCTURES INCLUDING ELASTROSTATIC DISCHARGE BALLASTING RESISTOR BASED ON BURIED POWER RAIL Dec 1, 2021 Pending
Array ( [id] => 17477416 [patent_doc_number] => 20220084920 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-03-17 [patent_title] => SEMICONDUCTOR PACKAGE STRUCTURES AND METHODS OF MANUFACTURE [patent_app_type] => utility [patent_app_number] => 17/457148 [patent_app_country] => US [patent_app_date] => 2021-12-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12374 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17457148 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/457148
Semiconductor package structures and methods of manufacture Nov 30, 2021 Issued
Array ( [id] => 17645462 [patent_doc_number] => 20220173201 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-06-02 [patent_title] => Display Apparatus [patent_app_type] => utility [patent_app_number] => 17/535039 [patent_app_country] => US [patent_app_date] => 2021-11-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9117 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17535039 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/535039
Display apparatus Nov 23, 2021 Issued
Array ( [id] => 19767451 [patent_doc_number] => 12225767 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-02-11 [patent_title] => Array substrate, method for manufacturing the same, display panel and display device [patent_app_type] => utility [patent_app_number] => 17/535146 [patent_app_country] => US [patent_app_date] => 2021-11-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 21 [patent_no_of_words] => 10103 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 308 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17535146 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/535146
Array substrate, method for manufacturing the same, display panel and display device Nov 23, 2021 Issued
Array ( [id] => 20119593 [patent_doc_number] => 12369331 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-07-22 [patent_title] => Electronic device and method for fabricating the same [patent_app_type] => utility [patent_app_number] => 17/524510 [patent_app_country] => US [patent_app_date] => 2021-11-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 42 [patent_no_of_words] => 8813 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 195 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17524510 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/524510
Electronic device and method for fabricating the same Nov 10, 2021 Issued
Array ( [id] => 18362459 [patent_doc_number] => 20230144050 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-05-11 [patent_title] => PHASE CHANGE MEMORY WITH ENCAPSULATED PHASE CHANGE ELEMENT [patent_app_type] => utility [patent_app_number] => 17/519924 [patent_app_country] => US [patent_app_date] => 2021-11-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4792 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 56 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17519924 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/519924
Phase change memory with encapsulated phase change element Nov 4, 2021 Issued
Array ( [id] => 18157965 [patent_doc_number] => 20230024555 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-01-26 [patent_title] => THERMAL CONDUCTION STRUCTURE, FORMING METHOD THEREOF, CHIP AND CHIP STACKING STRUCTURE [patent_app_type] => utility [patent_app_number] => 17/515783 [patent_app_country] => US [patent_app_date] => 2021-11-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5993 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 55 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17515783 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/515783
THERMAL CONDUCTION STRUCTURE, FORMING METHOD THEREOF, CHIP AND CHIP STACKING STRUCTURE Oct 31, 2021 Abandoned
Array ( [id] => 19199252 [patent_doc_number] => 11996503 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-05-28 [patent_title] => Display device [patent_app_type] => utility [patent_app_number] => 17/510393 [patent_app_country] => US [patent_app_date] => 2021-10-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 27 [patent_no_of_words] => 6306 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17510393 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/510393
Display device Oct 25, 2021 Issued
Array ( [id] => 17403103 [patent_doc_number] => 20220045194 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-02-10 [patent_title] => SEMICONDUCTOR DEVICE STRUCTURE WITH INNER SPACER LAYER [patent_app_type] => utility [patent_app_number] => 17/504104 [patent_app_country] => US [patent_app_date] => 2021-10-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11712 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17504104 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/504104
Semiconductor device structure with inner spacer layer Oct 17, 2021 Issued
Array ( [id] => 17432053 [patent_doc_number] => 20220059763 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-02-24 [patent_title] => MEMORY CELLS WITH ASYMMETRICAL ELECTRODE INTERFACES [patent_app_type] => utility [patent_app_number] => 17/480694 [patent_app_country] => US [patent_app_date] => 2021-09-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 21641 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17480694 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/480694
Memory cells with asymmetrical electrode interfaces Sep 20, 2021 Issued
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