Search

Dipakkumar B. Gandhi

Examiner (ID: 6989, Phone: (571)272-3822 , Office: P/2117 )

Most Active Art Unit
2117
Art Unit(s)
2138, 2117, 2133, 2111
Total Applications
939
Issued Applications
765
Pending Applications
18
Abandoned Applications
156

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 11021869 [patent_doc_number] => 20160218825 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-07-28 [patent_title] => 'RATELESS DECODING' [patent_app_type] => utility [patent_app_number] => 15/023496 [patent_app_country] => US [patent_app_date] => 2014-09-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5997 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15023496 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/023496
RATELESS DECODING Sep 25, 2014 Abandoned
Array ( [id] => 11264963 [patent_doc_number] => 09489259 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-11-08 [patent_title] => 'Low density parity check encoder having length of 16200 and code rate of 2/15, and low density parity check encoding method using the same' [patent_app_type] => utility [patent_app_number] => 14/496304 [patent_app_country] => US [patent_app_date] => 2014-09-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 5689 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 189 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14496304 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/496304
Low density parity check encoder having length of 16200 and code rate of 2/15, and low density parity check encoding method using the same Sep 24, 2014 Issued
Array ( [id] => 11285496 [patent_doc_number] => 09501350 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-11-22 [patent_title] => 'Detecting unidirectional resistance drift errors in a multilevel cell of a phase change memory' [patent_app_type] => utility [patent_app_number] => 14/492186 [patent_app_country] => US [patent_app_date] => 2014-09-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 7602 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 185 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14492186 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/492186
Detecting unidirectional resistance drift errors in a multilevel cell of a phase change memory Sep 21, 2014 Issued
Array ( [id] => 15141281 [patent_doc_number] => 10484139 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-11-19 [patent_title] => Address verification on a bus [patent_app_type] => utility [patent_app_number] => 14/491096 [patent_app_country] => US [patent_app_date] => 2014-09-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 8281 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 269 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14491096 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/491096
Address verification on a bus Sep 18, 2014 Issued
Array ( [id] => 11609060 [patent_doc_number] => 20170126365 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-05-04 [patent_title] => 'Hybrid Automatic Repeat Request Process Indication Method, Apparatus and System' [patent_app_type] => utility [patent_app_number] => 15/315278 [patent_app_country] => US [patent_app_date] => 2014-09-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 7702 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15315278 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/315278
Hybrid Automatic Repeat Request Process Indication Method, Apparatus and System Sep 18, 2014 Abandoned
Array ( [id] => 10425922 [patent_doc_number] => 20150310933 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-10-29 [patent_title] => 'Configurable Test Address And Data Generation For Multimode Memory Built-In Self-Testing' [patent_app_type] => utility [patent_app_number] => 14/482001 [patent_app_country] => US [patent_app_date] => 2014-09-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 7976 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14482001 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/482001
Configurable Test Address And Data Generation For Multimode Memory Built-In Self-Testing Sep 9, 2014 Abandoned
Array ( [id] => 9912243 [patent_doc_number] => 20150067445 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-03-05 [patent_title] => 'ADJUSTING A DISPERSAL PARAMETER OF DISPERSEDLY STORED DATA' [patent_app_type] => utility [patent_app_number] => 14/481245 [patent_app_country] => US [patent_app_date] => 2014-09-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 20 [patent_no_of_words] => 19473 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14481245 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/481245
Adjusting a dispersal parameter of dispersedly stored data Sep 8, 2014 Issued
Array ( [id] => 9800853 [patent_doc_number] => 20150012798 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-01-08 [patent_title] => 'UTILIZING LOCAL MEMORY AND DISPERSED STORAGE MEMORY TO ACCESS ENCODED DATA SLICES' [patent_app_type] => utility [patent_app_number] => 14/480945 [patent_app_country] => US [patent_app_date] => 2014-09-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 20 [patent_no_of_words] => 19476 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14480945 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/480945
Utilizing local memory and dispersed storage memory to access encoded data slices Sep 8, 2014 Issued
Array ( [id] => 10665793 [patent_doc_number] => 20160011937 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-01-14 [patent_title] => 'SEMICONDUCTOR MEMORY DEVICE, MEMORY CONTROLLER, AND CONTROL METHOD OF MEMORY CONTROLLER' [patent_app_type] => utility [patent_app_number] => 14/480028 [patent_app_country] => US [patent_app_date] => 2014-09-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 6299 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14480028 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/480028
SEMICONDUCTOR MEMORY DEVICE, MEMORY CONTROLLER, AND CONTROL METHOD OF MEMORY CONTROLLER Sep 7, 2014 Abandoned
Array ( [id] => 11222263 [patent_doc_number] => 09450614 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-09-20 [patent_title] => 'Memory module with integrated error correction' [patent_app_type] => utility [patent_app_number] => 14/475619 [patent_app_country] => US [patent_app_date] => 2014-09-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3684 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 155 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14475619 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/475619
Memory module with integrated error correction Sep 2, 2014 Issued
Array ( [id] => 11080181 [patent_doc_number] => 20160277145 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-09-22 [patent_title] => 'Enhanced Automatic identification System' [patent_app_type] => utility [patent_app_number] => 14/913775 [patent_app_country] => US [patent_app_date] => 2014-08-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 12050 [patent_no_of_claims] => 42 [patent_no_of_ind_claims] => 24 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14913775 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/913775
Enhanced automatic identification system Aug 21, 2014 Issued
Array ( [id] => 11465718 [patent_doc_number] => 09582349 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2017-02-28 [patent_title] => 'Methods and apparatus for detecting memory bit corruption on an integrated circuit' [patent_app_type] => utility [patent_app_number] => 14/464244 [patent_app_country] => US [patent_app_date] => 2014-08-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 6484 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 74 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14464244 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/464244
Methods and apparatus for detecting memory bit corruption on an integrated circuit Aug 19, 2014 Issued
Array ( [id] => 10703056 [patent_doc_number] => 20160049203 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-02-18 [patent_title] => 'SYSTEM AND METHOD OF USING MULTIPLE READ OPERATIONS' [patent_app_type] => utility [patent_app_number] => 14/457913 [patent_app_country] => US [patent_app_date] => 2014-08-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 18548 [patent_no_of_claims] => 46 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14457913 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/457913
System and method of using multiple read operations Aug 11, 2014 Issued
Array ( [id] => 9859934 [patent_doc_number] => 20150039951 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-02-05 [patent_title] => 'APPARATUS AND METHOD FOR ACQUIRING DATA OF FAST FAIL MEMORY' [patent_app_type] => utility [patent_app_number] => 14/446462 [patent_app_country] => US [patent_app_date] => 2014-07-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 1849 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14446462 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/446462
Apparatus and method for acquiring data of fast fail memory Jul 29, 2014 Issued
Array ( [id] => 11488557 [patent_doc_number] => 09594628 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-03-14 [patent_title] => 'Operational vibration compensation through media cache management' [patent_app_type] => utility [patent_app_number] => 14/447202 [patent_app_country] => US [patent_app_date] => 2014-07-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 17 [patent_no_of_words] => 6719 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 142 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14447202 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/447202
Operational vibration compensation through media cache management Jul 29, 2014 Issued
Array ( [id] => 10363326 [patent_doc_number] => 20150248331 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-09-03 [patent_title] => 'COMPUTING SYSTEM WITH DATA PROTECTION MECHANISM AND METHOD OF OPERATION THEREOF' [patent_app_type] => utility [patent_app_number] => 14/328770 [patent_app_country] => US [patent_app_date] => 2014-07-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5555 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14328770 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/328770
Computing system with data protection mechanism and method of operation thereof Jul 10, 2014 Issued
Array ( [id] => 10424853 [patent_doc_number] => 20150309864 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-10-29 [patent_title] => 'DATA STORAGE DEVICE AND METHOD FOR OPERATING THE SAME' [patent_app_type] => utility [patent_app_number] => 14/324920 [patent_app_country] => US [patent_app_date] => 2014-07-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 6061 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14324920 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/324920
Data storage device and method for operating the same Jul 6, 2014 Issued
Array ( [id] => 10384014 [patent_doc_number] => 20150269021 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-09-24 [patent_title] => 'DATA STORAGE DEVICE AND OPERATING METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 14/318517 [patent_app_country] => US [patent_app_date] => 2014-06-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4090 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14318517 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/318517
Data storage device and operating method thereof Jun 26, 2014 Issued
Array ( [id] => 12953092 [patent_doc_number] => 09837170 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-12-05 [patent_title] => Systems and methods for testing performance of memory modules [patent_app_type] => utility [patent_app_number] => 14/312837 [patent_app_country] => US [patent_app_date] => 2014-06-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3080 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 224 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14312837 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/312837
Systems and methods for testing performance of memory modules Jun 23, 2014 Issued
Array ( [id] => 10485612 [patent_doc_number] => 20150370631 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-12-24 [patent_title] => 'WRITE MAPPING TO MITIGATE HARD ERRORS VIA SOFT-DECISION DECODING' [patent_app_type] => utility [patent_app_number] => 14/311645 [patent_app_country] => US [patent_app_date] => 2014-06-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 8738 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14311645 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/311645
Write mapping to mitigate hard errors via soft-decision decoding Jun 22, 2014 Issued
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