Search

Dirk Wright

Examiner (ID: 11999, Phone: (571)272-7098 , Office: P/3659 )

Most Active Art Unit
3502
Art Unit(s)
3502, 3656, 3659, 3622, 3655, 2899, 3681
Total Applications
4396
Issued Applications
4127
Pending Applications
57
Abandoned Applications
218

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 4750904 [patent_doc_number] => 20080158975 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-07-03 [patent_title] => 'NON-VOLATILE STORAGE WITH BIAS FOR TEMPERATURE COMPENSATION' [patent_app_type] => utility [patent_app_number] => 11/618786 [patent_app_country] => US [patent_app_date] => 2006-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 26 [patent_no_of_words] => 18673 [patent_no_of_claims] => 35 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0158/20080158975.pdf [firstpage_image] =>[orig_patent_app_number] => 11618786 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/618786
Non-volatile storage with bias for temperature compensation Dec 29, 2006 Issued
Array ( [id] => 4750905 [patent_doc_number] => 20080158976 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-07-03 [patent_title] => 'BIASING NON-VOLATILE STORAGE BASED ON SELECTED WORD LINE' [patent_app_type] => utility [patent_app_number] => 11/618788 [patent_app_country] => US [patent_app_date] => 2006-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 26 [patent_no_of_words] => 18765 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0158/20080158976.pdf [firstpage_image] =>[orig_patent_app_number] => 11618788 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/618788
Biasing non-volatile storage based on selected word line Dec 29, 2006 Issued
Array ( [id] => 4750936 [patent_doc_number] => 20080159007 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-07-03 [patent_title] => 'NON-VOLATILE STORAGE WITH BIAS BASED ON SELECTED WORD LINE' [patent_app_type] => utility [patent_app_number] => 11/618790 [patent_app_country] => US [patent_app_date] => 2006-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 26 [patent_no_of_words] => 18786 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0159/20080159007.pdf [firstpage_image] =>[orig_patent_app_number] => 11618790 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/618790
Non-volatile storage with bias based on selective word line Dec 29, 2006 Issued
Array ( [id] => 603471 [patent_doc_number] => 07433241 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-10-07 [patent_title] => 'Programming non-volatile memory with reduced program disturb by removing pre-charge dependency on word line data' [patent_app_type] => utility [patent_app_number] => 11/618580 [patent_app_country] => US [patent_app_date] => 2006-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 25 [patent_no_of_words] => 15920 [patent_no_of_claims] => 34 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/433/07433241.pdf [firstpage_image] =>[orig_patent_app_number] => 11618580 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/618580
Programming non-volatile memory with reduced program disturb by removing pre-charge dependency on word line data Dec 28, 2006 Issued
Array ( [id] => 4750932 [patent_doc_number] => 20080159003 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-07-03 [patent_title] => 'SYSTEMS FOR PROGRAMMING NON-VOLATILE MEMORY WITH REDUCED PROGRAM DISTURB BY REMOVING PRE-CHARGE DEPENDENCY ON WORD LINE DATA' [patent_app_type] => utility [patent_app_number] => 11/618594 [patent_app_country] => US [patent_app_date] => 2006-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 15897 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0159/20080159003.pdf [firstpage_image] =>[orig_patent_app_number] => 11618594 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/618594
Systems for programming non-volatile memory with reduced program disturb by removing pre-charge dependency on word line data Dec 28, 2006 Issued
Array ( [id] => 4750933 [patent_doc_number] => 20080159004 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-07-03 [patent_title] => 'PROGRAMMING NON-VOLATILE MEMORY WITH REDUCED PROGRAM DISTURB BY USING DIFFERENT PRE-CHARGE ENABLE VOLTAGES' [patent_app_type] => utility [patent_app_number] => 11/618600 [patent_app_country] => US [patent_app_date] => 2006-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 16063 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0159/20080159004.pdf [firstpage_image] =>[orig_patent_app_number] => 11618600 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/618600
Programming non-volatile memory with reduced program disturb by using different pre-charge enable voltages Dec 28, 2006 Issued
Array ( [id] => 4750914 [patent_doc_number] => 20080158985 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-07-03 [patent_title] => 'SYSTEMS FOR MARGINED NEIGHBOR READING FOR NON-VOLATILE MEMORY READ OPERATIONS INCLUDING COUPLING COMPENSATION' [patent_app_type] => utility [patent_app_number] => 11/618624 [patent_app_country] => US [patent_app_date] => 2006-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 25 [patent_no_of_words] => 25698 [patent_no_of_claims] => 33 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0158/20080158985.pdf [firstpage_image] =>[orig_patent_app_number] => 11618624 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/618624
Systems for margined neighbor reading for non-volatile memory read operations including coupling compensation Dec 28, 2006 Issued
Array ( [id] => 323682 [patent_doc_number] => 07518923 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-04-14 [patent_title] => 'Margined neighbor reading for non-volatile memory read operations including coupling compensation' [patent_app_type] => utility [patent_app_number] => 11/618616 [patent_app_country] => US [patent_app_date] => 2006-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 37 [patent_no_of_words] => 25688 [patent_no_of_claims] => 33 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/518/07518923.pdf [firstpage_image] =>[orig_patent_app_number] => 11618616 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/618616
Margined neighbor reading for non-volatile memory read operations including coupling compensation Dec 28, 2006 Issued
Array ( [id] => 4750903 [patent_doc_number] => 20080158974 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-07-03 [patent_title] => 'APPARATUS WITH ALTERNATING READ MODE' [patent_app_type] => utility [patent_app_number] => 11/618578 [patent_app_country] => US [patent_app_date] => 2006-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 15883 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0158/20080158974.pdf [firstpage_image] =>[orig_patent_app_number] => 11618578 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/618578
Apparatus with alternating read mode Dec 28, 2006 Issued
Array ( [id] => 827789 [patent_doc_number] => 07403434 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2008-07-22 [patent_title] => 'System for controlling voltage in non-volatile memory systems' [patent_app_type] => utility [patent_app_number] => 11/618544 [patent_app_country] => US [patent_app_date] => 2006-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 3802 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/403/07403434.pdf [firstpage_image] =>[orig_patent_app_number] => 11618544 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/618544
System for controlling voltage in non-volatile memory systems Dec 28, 2006 Issued
Array ( [id] => 581704 [patent_doc_number] => 07463531 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-12-09 [patent_title] => 'Systems for programming non-volatile memory with reduced program disturb by using different pre-charge enable voltages' [patent_app_type] => utility [patent_app_number] => 11/618606 [patent_app_country] => US [patent_app_date] => 2006-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 25 [patent_no_of_words] => 16081 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 182 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/463/07463531.pdf [firstpage_image] =>[orig_patent_app_number] => 11618606 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/618606
Systems for programming non-volatile memory with reduced program disturb by using different pre-charge enable voltages Dec 28, 2006 Issued
Array ( [id] => 4691999 [patent_doc_number] => 20080084770 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-04-10 [patent_title] => 'Semiconductor memory device' [patent_app_type] => utility [patent_app_number] => 11/647400 [patent_app_country] => US [patent_app_date] => 2006-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3240 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0084/20080084770.pdf [firstpage_image] =>[orig_patent_app_number] => 11647400 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/647400
Semiconductor memory device Dec 28, 2006 Issued
Array ( [id] => 357144 [patent_doc_number] => 07489586 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-02-10 [patent_title] => 'Semiconductor memory device and driving method thereof' [patent_app_type] => utility [patent_app_number] => 11/647402 [patent_app_country] => US [patent_app_date] => 2006-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 2074 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 132 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/489/07489586.pdf [firstpage_image] =>[orig_patent_app_number] => 11647402 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/647402
Semiconductor memory device and driving method thereof Dec 28, 2006 Issued
Array ( [id] => 842128 [patent_doc_number] => 07391644 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-06-24 [patent_title] => 'Phase-changeable memory device and read method thereof' [patent_app_type] => utility [patent_app_number] => 11/605212 [patent_app_country] => US [patent_app_date] => 2006-11-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 10 [patent_no_of_words] => 7615 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 66 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/391/07391644.pdf [firstpage_image] =>[orig_patent_app_number] => 11605212 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/605212
Phase-changeable memory device and read method thereof Nov 28, 2006 Issued
Array ( [id] => 578215 [patent_doc_number] => 07466578 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-12-16 [patent_title] => 'Methods and systems for read-only memory' [patent_app_type] => utility [patent_app_number] => 11/604960 [patent_app_country] => US [patent_app_date] => 2006-11-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 31 [patent_no_of_words] => 6568 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/466/07466578.pdf [firstpage_image] =>[orig_patent_app_number] => 11604960 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/604960
Methods and systems for read-only memory Nov 27, 2006 Issued
Array ( [id] => 5251859 [patent_doc_number] => 20070133315 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-06-14 [patent_title] => 'Dynamic random access memory device and associated refresh cycle' [patent_app_type] => utility [patent_app_number] => 11/604708 [patent_app_country] => US [patent_app_date] => 2006-11-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3698 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0133/20070133315.pdf [firstpage_image] =>[orig_patent_app_number] => 11604708 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/604708
Dynamic random access memory device and associated refresh cycle Nov 27, 2006 Issued
Array ( [id] => 312091 [patent_doc_number] => 07529127 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-05-05 [patent_title] => 'Memory device and method thereof' [patent_app_type] => utility [patent_app_number] => 11/604692 [patent_app_country] => US [patent_app_date] => 2006-11-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 3495 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/529/07529127.pdf [firstpage_image] =>[orig_patent_app_number] => 11604692 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/604692
Memory device and method thereof Nov 27, 2006 Issued
Array ( [id] => 5251867 [patent_doc_number] => 20070133323 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-06-14 [patent_title] => 'Repair circuit and method of repairing defects in a semiconductor memory device' [patent_app_type] => utility [patent_app_number] => 11/604700 [patent_app_country] => US [patent_app_date] => 2006-11-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 5711 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0133/20070133323.pdf [firstpage_image] =>[orig_patent_app_number] => 11604700 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/604700
Repair circuit and method of repairing defects in a semiconductor memory device Nov 27, 2006 Issued
Array ( [id] => 5021189 [patent_doc_number] => 20070147155 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-06-28 [patent_title] => 'Memory Device Having a Configurable Oscillator for Refresh Operation' [patent_app_type] => utility [patent_app_number] => 11/562856 [patent_app_country] => US [patent_app_date] => 2006-11-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 4600 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0147/20070147155.pdf [firstpage_image] =>[orig_patent_app_number] => 11562856 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/562856
Memory Device Having a Configurable Oscillator for Refresh Operation Nov 21, 2006 Issued
Array ( [id] => 858864 [patent_doc_number] => 07376044 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-05-20 [patent_title] => 'Burst read circuit in semiconductor memory device and burst data read method thereof' [patent_app_type] => utility [patent_app_number] => 11/591580 [patent_app_country] => US [patent_app_date] => 2006-11-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4320 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/376/07376044.pdf [firstpage_image] =>[orig_patent_app_number] => 11591580 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/591580
Burst read circuit in semiconductor memory device and burst data read method thereof Nov 1, 2006 Issued
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