Search

Dirk Wright

Examiner (ID: 11999, Phone: (571)272-7098 , Office: P/3659 )

Most Active Art Unit
3502
Art Unit(s)
3502, 3656, 3659, 3622, 3655, 2899, 3681
Total Applications
4396
Issued Applications
4127
Pending Applications
57
Abandoned Applications
218

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 5665877 [patent_doc_number] => 20060171227 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-08-03 [patent_title] => 'Low-voltage reading device in particular for MRAM memory' [patent_app_type] => utility [patent_app_number] => 11/281264 [patent_app_country] => US [patent_app_date] => 2005-11-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4969 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0171/20060171227.pdf [firstpage_image] =>[orig_patent_app_number] => 11281264 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/281264
Low-voltage reading device in particular for MRAM memory Nov 16, 2005 Abandoned
Array ( [id] => 5654298 [patent_doc_number] => 20060140033 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-06-29 [patent_title] => 'Data bus architecture for a semiconductor memory' [patent_app_type] => utility [patent_app_number] => 11/281932 [patent_app_country] => US [patent_app_date] => 2005-11-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4978 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0140/20060140033.pdf [firstpage_image] =>[orig_patent_app_number] => 11281932 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/281932
Data bus architecture for a semiconductor memory Nov 16, 2005 Issued
Array ( [id] => 451399 [patent_doc_number] => 07251193 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-07-31 [patent_title] => 'Pseudo-dual port memory where ratio of first to second memory access is clock duty cycle independent' [patent_app_type] => utility [patent_app_number] => 11/282333 [patent_app_country] => US [patent_app_date] => 2005-11-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 7827 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 147 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/251/07251193.pdf [firstpage_image] =>[orig_patent_app_number] => 11282333 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/282333
Pseudo-dual port memory where ratio of first to second memory access is clock duty cycle independent Nov 16, 2005 Issued
Array ( [id] => 887699 [patent_doc_number] => 07352614 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-04-01 [patent_title] => 'Systems and methods for reading and writing a magnetic memory device' [patent_app_type] => utility [patent_app_number] => 11/281658 [patent_app_country] => US [patent_app_date] => 2005-11-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 4502 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/352/07352614.pdf [firstpage_image] =>[orig_patent_app_number] => 11281658 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/281658
Systems and methods for reading and writing a magnetic memory device Nov 16, 2005 Issued
Array ( [id] => 5589728 [patent_doc_number] => 20060039179 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-02-23 [patent_title] => 'Low power circuits with small voltage swing transmission, voltage regeneration and wide bandwidth architecture' [patent_app_type] => utility [patent_app_number] => 11/248863 [patent_app_country] => US [patent_app_date] => 2005-10-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5531 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0039/20060039179.pdf [firstpage_image] =>[orig_patent_app_number] => 11248863 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/248863
Low power circuits with small voltage swing transmission, voltage regeneration and wide bandwidth architecture Oct 11, 2005 Issued
Array ( [id] => 5864351 [patent_doc_number] => 20060098481 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-05-11 [patent_title] => 'Circuitry for and method of improving statistical distribution of integrated circuits' [patent_app_type] => utility [patent_app_number] => 11/247774 [patent_app_country] => US [patent_app_date] => 2005-10-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 4733 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0098/20060098481.pdf [firstpage_image] =>[orig_patent_app_number] => 11247774 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/247774
Circuitry for and method of improving statistical distribution of integrated circuits Oct 10, 2005 Issued
Array ( [id] => 5806351 [patent_doc_number] => 20060092704 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-05-04 [patent_title] => 'Semiconductor device' [patent_app_type] => utility [patent_app_number] => 11/246164 [patent_app_country] => US [patent_app_date] => 2005-10-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 5432 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0092/20060092704.pdf [firstpage_image] =>[orig_patent_app_number] => 11246164 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/246164
Semiconductor device Oct 10, 2005 Issued
Array ( [id] => 5742170 [patent_doc_number] => 20060087895 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-04-27 [patent_title] => 'Memory circuit with flexible bitline-related and/or wordline-related defect memory cell substitution' [patent_app_type] => utility [patent_app_number] => 11/246046 [patent_app_country] => US [patent_app_date] => 2005-10-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 9742 [patent_no_of_claims] => 33 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0087/20060087895.pdf [firstpage_image] =>[orig_patent_app_number] => 11246046 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/246046
Memory circuit with flexible bitline-related and/or wordline-related defect memory cell substitution Oct 6, 2005 Issued
Array ( [id] => 517405 [patent_doc_number] => 07200064 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2007-04-03 [patent_title] => 'Apparatus and method for providing a reprogrammable electrically programmable fuse' [patent_app_type] => utility [patent_app_number] => 11/246586 [patent_app_country] => US [patent_app_date] => 2005-10-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 7 [patent_no_of_words] => 5786 [patent_no_of_claims] => 35 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 41 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/200/07200064.pdf [firstpage_image] =>[orig_patent_app_number] => 11246586 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/246586
Apparatus and method for providing a reprogrammable electrically programmable fuse Oct 6, 2005 Issued
Array ( [id] => 929158 [patent_doc_number] => 07315470 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-01-01 [patent_title] => 'Data storage device and associated method for writing data to, and reading data from an unpatterned magnetic layer' [patent_app_type] => utility [patent_app_number] => 11/243360 [patent_app_country] => US [patent_app_date] => 2005-10-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 35 [patent_no_of_words] => 14460 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 69 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/315/07315470.pdf [firstpage_image] =>[orig_patent_app_number] => 11243360 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/243360
Data storage device and associated method for writing data to, and reading data from an unpatterned magnetic layer Oct 2, 2005 Issued
Array ( [id] => 5825357 [patent_doc_number] => 20060062051 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-03-23 [patent_title] => 'Memory device with unipolar and bipolar selectors' [patent_app_type] => utility [patent_app_number] => 11/233464 [patent_app_country] => US [patent_app_date] => 2005-09-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3995 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0062/20060062051.pdf [firstpage_image] =>[orig_patent_app_number] => 11233464 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/233464
Memory device with unipolar and bipolar selectors Sep 21, 2005 Issued
Array ( [id] => 7590438 [patent_doc_number] => 07663907 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-02-16 [patent_title] => 'Die customization using programmable resistance memory elements' [patent_app_type] => utility [patent_app_number] => 11/229955 [patent_app_country] => US [patent_app_date] => 2005-09-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4749 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/663/07663907.pdf [firstpage_image] =>[orig_patent_app_number] => 11229955 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/229955
Die customization using programmable resistance memory elements Sep 18, 2005 Issued
Array ( [id] => 906016 [patent_doc_number] => 07336516 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-02-26 [patent_title] => 'Unified multilevel memory systems and methods' [patent_app_type] => utility [patent_app_number] => 11/229191 [patent_app_country] => US [patent_app_date] => 2005-09-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 14 [patent_no_of_words] => 9874 [patent_no_of_claims] => 39 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/336/07336516.pdf [firstpage_image] =>[orig_patent_app_number] => 11229191 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/229191
Unified multilevel memory systems and methods Sep 14, 2005 Issued
Array ( [id] => 5055551 [patent_doc_number] => 20070058472 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-03-15 [patent_title] => 'Fuse structure for semiconductor device and controlling method thereof' [patent_app_type] => utility [patent_app_number] => 11/220786 [patent_app_country] => US [patent_app_date] => 2005-09-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 2281 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0058/20070058472.pdf [firstpage_image] =>[orig_patent_app_number] => 11220786 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/220786
Fuse structure for semiconductor device and controlling method thereof Sep 5, 2005 Abandoned
Array ( [id] => 684187 [patent_doc_number] => 07082054 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-07-25 [patent_title] => 'Semiconductor storage device having page copying function' [patent_app_type] => utility [patent_app_number] => 11/219193 [patent_app_country] => US [patent_app_date] => 2005-09-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 11 [patent_no_of_words] => 4817 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 32 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/082/07082054.pdf [firstpage_image] =>[orig_patent_app_number] => 11219193 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/219193
Semiconductor storage device having page copying function Sep 1, 2005 Issued
Array ( [id] => 542782 [patent_doc_number] => 07180778 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-02-20 [patent_title] => 'Semiconductor storage device having page copying function' [patent_app_type] => utility [patent_app_number] => 11/219194 [patent_app_country] => US [patent_app_date] => 2005-09-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 11 [patent_no_of_words] => 4831 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 146 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/180/07180778.pdf [firstpage_image] =>[orig_patent_app_number] => 11219194 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/219194
Semiconductor storage device having page copying function Sep 1, 2005 Issued
Array ( [id] => 6929039 [patent_doc_number] => 20050280072 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-12-22 [patent_title] => 'Test mode decoder in a flash memory' [patent_app_type] => utility [patent_app_number] => 11/216263 [patent_app_country] => US [patent_app_date] => 2005-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 10249 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0280/20050280072.pdf [firstpage_image] =>[orig_patent_app_number] => 11216263 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/216263
Test mode decoder in a flash memory Aug 30, 2005 Abandoned
Array ( [id] => 5900515 [patent_doc_number] => 20060044871 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-03-02 [patent_title] => 'Semiconductor integrated circuit' [patent_app_type] => utility [patent_app_number] => 11/195684 [patent_app_country] => US [patent_app_date] => 2005-08-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 21 [patent_no_of_words] => 10795 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0044/20060044871.pdf [firstpage_image] =>[orig_patent_app_number] => 11195684 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/195684
Semiconductor integrated circuit Aug 2, 2005 Issued
Array ( [id] => 916566 [patent_doc_number] => 07327625 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-02-05 [patent_title] => 'Volatile memory devices with auto-refresh command unit and circuit for controlling auto-refresh operation thereof and related memory systems and operating methods' [patent_app_type] => utility [patent_app_number] => 11/194242 [patent_app_country] => US [patent_app_date] => 2005-08-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4962 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/327/07327625.pdf [firstpage_image] =>[orig_patent_app_number] => 11194242 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/194242
Volatile memory devices with auto-refresh command unit and circuit for controlling auto-refresh operation thereof and related memory systems and operating methods Jul 31, 2005 Issued
Array ( [id] => 929154 [patent_doc_number] => 07315466 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-01-01 [patent_title] => 'Semiconductor memory device and method for arranging and manufacturing the same' [patent_app_type] => utility [patent_app_number] => 11/191496 [patent_app_country] => US [patent_app_date] => 2005-07-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 56 [patent_figures_cnt] => 90 [patent_no_of_words] => 23832 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 66 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/315/07315466.pdf [firstpage_image] =>[orig_patent_app_number] => 11191496 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/191496
Semiconductor memory device and method for arranging and manufacturing the same Jul 27, 2005 Issued
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