Search

Dirk Wright

Examiner (ID: 11999, Phone: (571)272-7098 , Office: P/3659 )

Most Active Art Unit
3502
Art Unit(s)
3502, 3656, 3659, 3622, 3655, 2899, 3681
Total Applications
4396
Issued Applications
4127
Pending Applications
57
Abandoned Applications
218

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 441300 [patent_doc_number] => 07259984 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-08-21 [patent_title] => 'Multibit metal nanocrystal memories and fabrication' [patent_app_type] => utility [patent_app_number] => 10/718662 [patent_app_country] => US [patent_app_date] => 2003-11-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 28 [patent_figures_cnt] => 62 [patent_no_of_words] => 8611 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 196 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/259/07259984.pdf [firstpage_image] =>[orig_patent_app_number] => 10718662 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/718662
Multibit metal nanocrystal memories and fabrication Nov 23, 2003 Issued
Array ( [id] => 7418892 [patent_doc_number] => 20040208056 [patent_country] => US [patent_kind] => A9 [patent_issue_date] => 2004-10-21 [patent_title] => 'Integrated circuit memory devices and methods of programming the same in which the current drawn during a programming operation is independent of the data to be programmed' [patent_app_type] => corrected [patent_app_number] => 10/719265 [patent_app_country] => US [patent_app_date] => 2003-11-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 7466 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 104 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A9/0208/20040208056.pdf [firstpage_image] =>[orig_patent_app_number] => 10719265 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/719265
Integrated circuit memory devices and methods of programming the same in which the current drawn during a programming operation is independent of the data to be programmed Nov 20, 2003 Issued
Array ( [id] => 7418892 [patent_doc_number] => 20040208056 [patent_country] => US [patent_kind] => A9 [patent_issue_date] => 2004-10-21 [patent_title] => 'Integrated circuit memory devices and methods of programming the same in which the current drawn during a programming operation is independent of the data to be programmed' [patent_app_type] => corrected [patent_app_number] => 10/719265 [patent_app_country] => US [patent_app_date] => 2003-11-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 7466 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 104 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A9/0208/20040208056.pdf [firstpage_image] =>[orig_patent_app_number] => 10719265 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/719265
Integrated circuit memory devices and methods of programming the same in which the current drawn during a programming operation is independent of the data to be programmed Nov 20, 2003 Issued
Array ( [id] => 537640 [patent_doc_number] => 07184305 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-02-27 [patent_title] => 'Nonvolatile semiconductor storage device and row-line short defect detection method' [patent_app_type] => utility [patent_app_number] => 10/718440 [patent_app_country] => US [patent_app_date] => 2003-11-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 7539 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 182 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/184/07184305.pdf [firstpage_image] =>[orig_patent_app_number] => 10718440 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/718440
Nonvolatile semiconductor storage device and row-line short defect detection method Nov 18, 2003 Issued
Array ( [id] => 652231 [patent_doc_number] => 07113432 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-09-26 [patent_title] => 'Compressed event counting technique and application to a flash memory system' [patent_app_type] => utility [patent_app_number] => 10/718454 [patent_app_country] => US [patent_app_date] => 2003-11-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 15216 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 66 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/113/07113432.pdf [firstpage_image] =>[orig_patent_app_number] => 10718454 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/718454
Compressed event counting technique and application to a flash memory system Nov 18, 2003 Issued
Array ( [id] => 768633 [patent_doc_number] => 07009904 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-03-07 [patent_title] => 'Back-bias voltage generator with temperature control' [patent_app_type] => utility [patent_app_number] => 10/716762 [patent_app_country] => US [patent_app_date] => 2003-11-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 9 [patent_no_of_words] => 5061 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 64 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/009/07009904.pdf [firstpage_image] =>[orig_patent_app_number] => 10716762 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/716762
Back-bias voltage generator with temperature control Nov 18, 2003 Issued
Array ( [id] => 931951 [patent_doc_number] => 06980462 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2005-12-27 [patent_title] => 'Memory cell architecture for reduced routing congestion' [patent_app_type] => utility [patent_app_number] => 10/715929 [patent_app_country] => US [patent_app_date] => 2003-11-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 14 [patent_no_of_words] => 12925 [patent_no_of_claims] => 36 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 44 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/980/06980462.pdf [firstpage_image] =>[orig_patent_app_number] => 10715929 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/715929
Memory cell architecture for reduced routing congestion Nov 17, 2003 Issued
Array ( [id] => 964945 [patent_doc_number] => 06950352 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2005-09-27 [patent_title] => 'Method and apparatus for replacing a defective cell within a memory device having twisted bit lines' [patent_app_type] => utility [patent_app_number] => 10/716263 [patent_app_country] => US [patent_app_date] => 2003-11-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 4457 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/950/06950352.pdf [firstpage_image] =>[orig_patent_app_number] => 10716263 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/716263
Method and apparatus for replacing a defective cell within a memory device having twisted bit lines Nov 17, 2003 Issued
Array ( [id] => 1016132 [patent_doc_number] => 06894932 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2005-05-17 [patent_title] => 'Dual cell memory device having a top dielectric stack' [patent_app_type] => utility [patent_app_number] => 10/716230 [patent_app_country] => US [patent_app_date] => 2003-11-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 6241 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/894/06894932.pdf [firstpage_image] =>[orig_patent_app_number] => 10716230 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/716230
Dual cell memory device having a top dielectric stack Nov 17, 2003 Issued
Array ( [id] => 980458 [patent_doc_number] => 06930950 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-08-16 [patent_title] => 'Semiconductor memory device having self-precharge function' [patent_app_type] => utility [patent_app_number] => 10/706964 [patent_app_country] => US [patent_app_date] => 2003-11-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 6629 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 160 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/930/06930950.pdf [firstpage_image] =>[orig_patent_app_number] => 10706964 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/706964
Semiconductor memory device having self-precharge function Nov 13, 2003 Issued
Array ( [id] => 7401752 [patent_doc_number] => 20040105311 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-06-03 [patent_title] => 'Non-volatile memory with improved sensing and method therefor' [patent_app_type] => new [patent_app_number] => 10/712429 [patent_app_country] => US [patent_app_date] => 2003-11-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 8387 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 18 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0105/20040105311.pdf [firstpage_image] =>[orig_patent_app_number] => 10712429 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/712429
Non-volatile memory with improved sensing and method therefor Nov 11, 2003 Abandoned
Array ( [id] => 6904469 [patent_doc_number] => 20050099864 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-05-12 [patent_title] => 'Metal programmable self-timed memories' [patent_app_type] => utility [patent_app_number] => 10/706110 [patent_app_country] => US [patent_app_date] => 2003-11-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4264 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0099/20050099864.pdf [firstpage_image] =>[orig_patent_app_number] => 10706110 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/706110
Metal programmable self-timed memories Nov 11, 2003 Issued
Array ( [id] => 7451368 [patent_doc_number] => 20040196693 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-10-07 [patent_title] => 'Magnetic random access memory device having write test mode' [patent_app_type] => new [patent_app_number] => 10/702662 [patent_app_country] => US [patent_app_date] => 2003-11-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 36 [patent_figures_cnt] => 36 [patent_no_of_words] => 21383 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 169 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0196/20040196693.pdf [firstpage_image] =>[orig_patent_app_number] => 10702662 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/702662
Magnetic random access memory device having write test mode Nov 6, 2003 Issued
Array ( [id] => 7306334 [patent_doc_number] => 20040141368 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-07-22 [patent_title] => 'Magnetoresistive random access memory device' [patent_app_type] => new [patent_app_number] => 10/701468 [patent_app_country] => US [patent_app_date] => 2003-11-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 11961 [patent_no_of_claims] => 40 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0141/20040141368.pdf [firstpage_image] =>[orig_patent_app_number] => 10701468 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/701468
Magnetoresistive random access memory device Nov 5, 2003 Issued
Array ( [id] => 7287918 [patent_doc_number] => 20040109382 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-06-10 [patent_title] => 'Methods for generating output control signals in synchronous semiconductor memory devices and related semiconductor memory devices' [patent_app_type] => new [patent_app_number] => 10/702366 [patent_app_country] => US [patent_app_date] => 2003-11-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5766 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0109/20040109382.pdf [firstpage_image] =>[orig_patent_app_number] => 10702366 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/702366
Methods for generating output control signals in synchronous semiconductor memory devices and related semiconductor memory devices Nov 5, 2003 Issued
Array ( [id] => 957034 [patent_doc_number] => 06956788 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2005-10-18 [patent_title] => 'Asynchronous data structure for storing data generated by a DSP system' [patent_app_type] => utility [patent_app_number] => 10/701775 [patent_app_country] => US [patent_app_date] => 2003-11-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 5083 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 61 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/956/06956788.pdf [firstpage_image] =>[orig_patent_app_number] => 10701775 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/701775
Asynchronous data structure for storing data generated by a DSP system Nov 4, 2003 Issued
Array ( [id] => 834774 [patent_doc_number] => 07397688 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-07-08 [patent_title] => 'Nonvolatile variable resistor, memory device, and scaling method of nonvolatile variable resistor' [patent_app_type] => utility [patent_app_number] => 10/700467 [patent_app_country] => US [patent_app_date] => 2003-11-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 22 [patent_no_of_words] => 10004 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/397/07397688.pdf [firstpage_image] =>[orig_patent_app_number] => 10700467 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/700467
Nonvolatile variable resistor, memory device, and scaling method of nonvolatile variable resistor Nov 4, 2003 Issued
Array ( [id] => 986653 [patent_doc_number] => 06925025 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-08-02 [patent_title] => 'SRAM device and a method of powering-down the same' [patent_app_type] => utility [patent_app_number] => 10/701669 [patent_app_country] => US [patent_app_date] => 2003-11-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 5077 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 68 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/925/06925025.pdf [firstpage_image] =>[orig_patent_app_number] => 10701669 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/701669
SRAM device and a method of powering-down the same Nov 4, 2003 Issued
Array ( [id] => 7102623 [patent_doc_number] => 20050105349 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-05-19 [patent_title] => 'Programmable data strobe offset with DLL for double data rate (DDR) RAM memory' [patent_app_type] => utility [patent_app_number] => 10/699932 [patent_app_country] => US [patent_app_date] => 2003-11-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2655 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0105/20050105349.pdf [firstpage_image] =>[orig_patent_app_number] => 10699932 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/699932
Programmable data strobe offset with DLL for double data rate (DDR) RAM memory Nov 3, 2003 Issued
Array ( [id] => 944800 [patent_doc_number] => 06967856 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2005-11-22 [patent_title] => 'Content addressable memory (CAM) devices that utilize segmented match lines and word lines to support pipelined search and write operations and methods of operating same' [patent_app_type] => utility [patent_app_number] => 10/701048 [patent_app_country] => US [patent_app_date] => 2003-11-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 24 [patent_no_of_words] => 18723 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 43 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/967/06967856.pdf [firstpage_image] =>[orig_patent_app_number] => 10701048 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/701048
Content addressable memory (CAM) devices that utilize segmented match lines and word lines to support pipelined search and write operations and methods of operating same Nov 3, 2003 Issued
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